AMD Secure Encrypted Virtualization (SEV) is a set of security extensions built into AMD EPYC CPUs. Its primary function is to provide memory encryption for virtual machines (VMs). Each VM is assigned a unique encryption key by the processor's secure hardware, making its memory contents inaccessible to the hypervisor, other VMs, or any malicious software with high-level system privileges. This transforms the hypervisor from a trusted component into a potentially untrusted one, significantly reducing the attack surface for multi-tenant cloud environments.
Glossary
AMD SEV

What is AMD SEV?
AMD Secure Encrypted Virtualization (SEV) is a hardware-based security feature for AMD EPYC server processors that encrypts a virtual machine's memory using a unique, VM-specific key, isolating it from the hypervisor and other VMs on the same host.
SEV is a cornerstone of confidential computing, enabling Confidential VMs (CVMs). It protects data in use, complementing encryption for data at rest and in transit. The technology includes Secure Nested Paging (SNP) to prevent hypervisor-based memory integrity attacks and supports remote attestation, allowing a remote party to cryptographically verify that a VM is running securely on genuine SEV hardware. This makes SEV critical for secure, multi-tenant cloud infrastructure and for isolating sensitive workloads like AI agent tool execution.
Key Features of AMD SEV
AMD Secure Encrypted Virtualization (SEV) is a hardware-based security feature set for AMD EPYC processors that encrypts a virtual machine's memory with a unique, VM-specific key, isolating it from the hypervisor and other VMs.
Transparent Memory Encryption
AMD SEV provides transparent memory encryption for virtual machines. Each VM is assigned a unique encryption key, generated and managed by the secure AMD Secure Processor (ASP). This key is used by the on-die Memory Controller to automatically encrypt all data written to RAM and decrypt it upon reading, making the encryption process invisible to the guest OS and applications.
- Key Isolation: The hypervisor never has access to the VM's memory encryption keys.
- Hardware-Based: Encryption/decryption occurs in the memory controller, minimizing performance overhead.
- Protection Scope: Encrypts the entire VM state in memory, including CPU registers (with SEV-ES and SEV-SNP).
Secure Encrypted Virtualization with Encrypted State (SEV-ES)
SEV-ES extends base SEV by adding protection for the CPU register state. When a VM is interrupted (e.g., for I/O), the hypervisor must save its register context. SEV-ES encrypts this register state before the hypervisor can access it, closing a significant attack vector.
- Register Protection: Encrypts guest register state (RAX, RBX, etc.) on a #VC (VMM Communication) exception.
- Hypervisor Blindness: The hypervisor handles an encrypted blob of register data, preventing it from reading or manipulating the VM's execution state.
- Minimal Guest Modifications: Requires paravirtualized drivers in the guest OS to handle the secure communication protocol.
Secure Nested Paging (SEV-SNP)
SEV-SNP is the most advanced iteration, introducing strong integrity protections to prevent hypervisor-based attacks like data replay, memory re-mapping, and corruption. It adds hardware-enforced Reverse Map (RMP) tables and guest page validation.
- Memory Integrity: Guarantees that encrypted memory pages have not been altered, swapped, or replayed by a malicious hypervisor.
- Isolated Execution Environment: Protects against attestation replay attacks by cryptographically tying a VM's launch measurement to its current state.
- Foundation for Confidential VMs: SEV-SNP is the basis for Confidential VMs (CVMs) in major cloud platforms like Google Cloud Confidential Computing and Microsoft Azure Confidential VMs.
Remote Attestation
A critical feature for deploying SEV-protected workloads in untrusted environments (e.g., public cloud). Remote Attestation allows a remote party to cryptographically verify the integrity and security state of a VM running on SEV hardware.
- Proof of Launch: The verifier receives a signed report from the AMD Secure Processor (ASP) containing a measurement of the VM's initial state (firmware, bootloader, kernel).
- Trust Chain: This measurement is rooted in the hardware's fused-in certificate, establishing a chain of trust from the silicon to the launched software.
- Runtime Reporting: With SEV-SNP, attestation reports can also include runtime measurements, proving the VM is running with integrity protections active.
Reduced Trusted Computing Base (TCB)
A primary security goal of AMD SEV is to dramatically shrink the Trusted Computing Base (TCB). The TCB is the set of software/hardware that must be trusted for the system to be secure.
- Traditional VM: TCB includes the entire hypervisor, host OS, and firmware.
- SEV-Protected VM: The TCB is reduced to the AMD Secure Processor (ASP) silicon and the guest VM's own software. The hypervisor is removed from the TCB.
- Security Benefit: This architecture mitigates risk from hypervisor vulnerabilities, compromised host administrators, and malicious co-tenants on the same physical server.
Hypervisor Transparency & Minimal Guest Modifications
AMD SEV is designed for practical deployment. It requires minimal changes to the hypervisor and guest operating system, especially with later generations (SEV, SEV-ES).
- Hypervisor Role: The hypervisor retains its management functions (scheduling, resource allocation) but is blinded to VM memory and register content.
- Guest OS Support: Base SEV often requires no guest OS changes. SEV-ES and SEV-SNP require paravirtualized drivers (e.g.,
sev-guestdriver in Linux) to handle secure communication with the ASP. - Compatibility: Enables the protection of unmodified, legacy applications within an encrypted VM, a key advantage for enterprise lift-and-shift scenarios to confidential computing clouds.
How AMD SEV Works
AMD Secure Encrypted Virtualization (SEV) is a processor-level security feature that encrypts a virtual machine's memory using a unique, hardware-generated key to protect it from a compromised hypervisor and other VMs.
AMD SEV works by integrating a dedicated security processor, the AMD Secure Processor (ASP), into the EPYC CPU. For each virtual machine, the ASP generates a unique AES encryption key, which is never exposed to the hypervisor or system software. All VM memory pages are transparently encrypted and decrypted by the on-die memory controller as data moves between the CPU and RAM. This creates a hardware-enforced boundary where even a malicious or compromised hypervisor cannot access a protected VM's memory in plaintext.
The technology extends to SEV-Encrypted State (SEV-ES), which also encrypts the CPU register state during hypervisor transitions, and SEV-Secure Nested Paging (SEV-SNP), which adds integrity protection to prevent malicious hypervisor memory remapping attacks. Remote Attestation allows a remote party to cryptographically verify that a VM is running on genuine SEV hardware with a specific initial state. This enables Confidential Computing scenarios in cloud environments, where a tenant's workload and data remain encrypted during processing, inaccessible to the cloud provider's infrastructure software.
Frequently Asked Questions
AMD Secure Encrypted Virtualization (SEV) is a critical hardware security feature for confidential computing. These FAQs address its core mechanisms, use cases, and how it compares to other trusted execution environments.
AMD Secure Encrypted Virtualization (SEV) is a hardware-based security feature on AMD EPYC processors that encrypts a virtual machine's (VM) memory with a unique, VM-specific key generated by the processor's secure hardware, isolating it from the hypervisor and other VMs. It works by integrating a dedicated security processor, the AMD Secure Processor (ASP), into the System-on-a-Chip (SoC). When SEV is enabled, the ASP generates a unique encryption key for each VM. All memory pages belonging to that VM are transparently encrypted by the memory controller as they leave the CPU die for RAM, and decrypted when read back. The hypervisor manages VM scheduling and memory allocation but cannot access the plaintext data or the VM's encryption key, which never leaves the secure hardware. This creates a hardware-rooted trust boundary that protects VM confidentiality and integrity from a compromised hypervisor, a threat model known as the 'malicious cloud provider'.
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Related Terms
AMD SEV is a key technology within the broader domain of secure enclave execution. The following terms define the ecosystem of hardware and software mechanisms that enable isolated, confidential computing for AI agents and other sensitive workloads.
Trusted Execution Environment (TEE)
A Trusted Execution Environment (TEE) is a secure, isolated area within a main processor. It guarantees the confidentiality and integrity of code and data loaded inside it. The TEE protects these assets from all other software on the platform, including a compromised operating system. AMD SEV creates a TEE at the virtual machine (VM) level, while technologies like Intel SGX create TEEs (enclaves) at the application level. Key properties include:
- Isolation: Hardware-enforced separation from the "rich" OS.
- Attestation: Ability to prove the TEE's integrity to a remote party.
- Sealed Storage: Secure, TEE-bound encryption of persistent data.
Intel SGX
Intel Software Guard Extensions (SGX) is Intel's flagship TEE technology. It allows applications to create private memory regions called enclaves. Code and data inside an enclave are protected from processes running at higher privilege levels, including the OS and hypervisor. Unlike AMD SEV, which encrypts an entire VM's memory, SGX provides fine-grained isolation at the application or function level. This makes SGX suitable for protecting specific algorithms or data segments within a larger, untrusted application, a common pattern in privacy-preserving AI inference.
Remote Attestation
Remote Attestation is a critical cryptographic protocol that underpins trust in TEEs like those created by AMD SEV. It allows a remote verifier (e.g., a service provider or a client) to cryptographically verify that:
- The software is running inside a genuine hardware TEE (not an emulator).
- The TEE's contents (code and initial data) are in a known, trusted state.
- The TEE's identity and properties are certified by the hardware manufacturer (e.g., AMD). This process establishes a root of trust from the silicon to the application, enabling secure deployment of AI agents that must prove their integrity before receiving sensitive tasks or data.
Hardware Root of Trust
A Hardware Root of Trust is an immutable, always-on security engine embedded within a silicon chip. It serves as the foundational, trusted source for all security operations on the platform. For AMD SEV, this is implemented via the AMD Secure Processor (ASP), a dedicated security coprocessor. The ASP:
- Generates and protects the unique encryption keys for each VM.
- Performs cryptographic measurements during platform boot.
- Facilitates the remote attestation process. This hardware-based anchor ensures that the security guarantees of SEV cannot be subverted by software alone, as all critical operations originate in this protected silicon.

About the author
Prasad Kumkar
CEO & MD, Inference Systems
Prasad Kumkar is the CEO & MD of Inference Systems and writes about AI systems architecture, LLM infrastructure, model serving, evaluation, and production deployment. Over 5+ years, he has worked across computer vision models, L5 autonomous vehicle systems, and LLM research, with a focus on taking complex AI ideas into real-world engineering systems.
His work and writing cover AI systems, large language models, AI agents, multimodal systems, autonomous systems, inference optimization, RAG, evaluation, and production AI engineering.
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