Wake-on-Event

The core enabler of wake-on-event is a dedicated, minimal always-on (AON) power domain. This tiny circuit, often just a simple state machine or ultra-low-power microcontroller (e.g., an Arm Cortex-M0+), remains active while the main CPU and other subsystems are in a deep sleep state (e.g., a C-state like C7). It continuously monitors one or more wake-up sources, drawing only microamps of current. This domain is physically isolated on the chip to prevent leakage from the sleeping logic.

Wake-up events originate from hardware peripherals that can operate independently of the main CPU. Common triggers include:

• Digital GPIO Interrupts: A change in state on a configured pin, such as a button press or a signal from an external sensor.
• Analog Comparator: Wakes the system when a sensor's analog voltage (e.g., from a photodiode or temperature sensor) crosses a pre-set threshold.
• Real-Time Clock (RTC) Alarm: A timed event from a low-power clock, enabling periodic sampling.
• Wake-Up Radio (WUR): A specialized, simple receiver that listens for a specific RF packet or pattern while consuming orders of magnitude less power than the main radio.

To avoid waking the main CPU for irrelevant data, the AON domain can perform basic sensor data pre-processing. For example, an integrated low-power accelerometer might be configured to only generate a wake-up event if motion exceeds a specific magnitude (activity detection) or matches a simple pattern (tap detection). This adaptive sampling and thresholding at the sensor level is a key technique for minimizing system-level energy consumption in TinyML applications.

A critical system specification is the wake-up latency—the time from the trigger event to the main CPU being ready to execute code. This is dictated by:

• The speed of the AON domain's interrupt handling.
• The time required to restore power and clock to the main CPU cores and essential peripherals.
• The time to restore context from non-volatile memory if the system was in a hibernation state. For always-on voice assistants or fall detection, this latency must be reliably under 100ms, often targeting 10ms or less.

In complex systems, wake-on-event logic is tightly coordinated with an external Power Management IC (PMIC). The AON domain communicates with the PMIC via a low-power bus (e.g., I2C) to sequence the power rails: it may signal the PMIC to enable the 1.8V rail for the core logic, then the 3.3V rail for I/O, ensuring a stable and controlled power-up sequence. The PMIC itself can also be a wake-up source, responding to events like a battery insertion or a charger connect.

In systems running an OS like Linux, wake-on-event capabilities are exposed to the kernel and applications through standards like the Advanced Configuration and Power Interface (ACPI). ACPI defines sleep states (S-states) and wake events. For example, a system in S3 (Suspend-to-RAM) can be woken via a GPIO interrupt defined in the ACPI tables. This abstraction allows application developers to configure wake sources (e.g., echo enabled > /sys/class/.../wakeup) without detailed knowledge of the underlying hardware registers.

A dedicated, ultra-low-power analog comparator circuit monitors a sensor's voltage output. When the signal crosses a pre-set voltage threshold, the comparator generates a digital interrupt that wakes the main MCU. This is the most energy-efficient method for simple event detection.

• Example: A temperature sensor's output wakes the system only when it exceeds 30°C.
• Key Benefit: The main MCU and its ADC remain completely powered off until needed, saving milliwatts of power.

Many modern sensors (e.g., accelerometers, PIR motion detectors) include a built-in digital signal processor and configurable interrupt pins. They can process data internally and only signal the host MCU when a specific condition is met.

• Example: An accelerometer configured for "free-fall detection" wakes the system only upon a sudden drop.
• Key Benefit: Offloads simple digital signal processing (DSP) tasks to a specialized, lower-power peripheral.

An always-on domain Real-Time Clock (RTC) maintains timekeeping with nanoamp current draw. A programmed RTC alarm generates a periodic wake-up signal at fixed intervals, enabling time-based sampling or scheduled communication.

• Example: A wildlife tracker wakes every hour to take a GPS fix and transmit data.
• Key Benefit: Enables predictable, scheduled duty cycling with extremely low timekeeping overhead.

A secondary, ultra-simple wake-up receiver (WuR) circuit listens for a specific, low-data-rate RF signature (e.g., a 100bps On-Off Keying pattern). Upon detecting its unique address, it triggers the main radio and MCU. This allows the primary high-power radio (e.g., LoRa, BLE) to remain off indefinitely.

• Example: A soil moisture sensor sleeps until it receives a "transmit now" ping from a passing drone.
• Key Benefit: Reduces average power consumption of wireless nodes by orders of magnitude compared to periodic listening.

A change in the logic level on a designated General-Purpose Input/Output (GPIO) pin can trigger a wake-up. This is often used for simple user interfaces or to signal from one subsystem to another.

• Example: A door contact switch changes a pin's state from HIGH to LOW, waking a security camera.
• Key Benefit: Provides a generic, flexible digital trigger for external events or inter-device communication.

Certain peripherals within the always-on domain can be configured to generate wake events based on internal conditions. This includes:

• UART: Receiving a start bit on the RX line.
• I2C/SPI: Detection of its own slave address on the bus.
• Timer/Counter: A counter reaching a specific value.

Key Benefit: Allows communication buses and timers to act as intelligent triggers without CPU intervention.

An always-on domain is a small, isolated power rail and logic section within a system-on-chip (SoC) designed to remain active while the main processor core and other subsystems are in a deep sleep state. It is the hardware foundation for wake-on-event systems.

• Function: Hosts ultra-low-power circuits like a real-time clock (RTC), simple state machines, and comparators to monitor sensor inputs or a wake-up radio.
• Power Profile: Consumes nanoamps to microamps of current, enabling months or years of battery life.
• Example: In a smart door sensor, the AON domain powers a magnetic reed switch comparator; when the door opens, the AON logic triggers a wake-up signal to the main MCU to run a full inference.

Duty cycling is a fundamental power-saving technique where a system alternates between a short, active state and a long, low-power sleep state. It is often contrasted with or combined with wake-on-event.

• Mechanism: The device wakes up on a fixed timer, performs a sensing task and inference, then returns to sleep. The duty cycle is the ratio of active time to the total period (e.g., 1% duty cycle = active for 10ms every second).
• Trade-off: Simpler to implement than wake-on-event but inherently less efficient for sporadic events, as energy is wasted on periodic wake-ups when nothing has changed.
• Hybrid Approach: Many systems use a wake-on-event for critical, immediate triggers (e.g., fall detection) and a slow duty cycle for periodic system health checks.

Adaptive sampling rate is a software technique that dynamically adjusts the frequency at which a sensor is read, based on the context or activity level. It optimizes the energy consumed by the sensor and its associated analog-to-digital converter (ADC).

• Use with Wake-on-Event: A wake-on-event system might use a simple, low-power analog circuit (in the AON domain) for threshold detection. Once the main processor is awakened, it can employ an adaptive sampling rate for a higher-fidelity sensor to analyze the event in detail.
• Example: A wearable fitness tracker normally samples an accelerometer at 1 Hz. Upon a wake-on-event trigger from a coarse motion detector, the main processor wakes and increases the sampling rate to 100 Hz to accurately classify the activity (running vs. walking).

A low-power inference mode is a specialized operational state of a machine learning accelerator or microcontroller core configured to execute a neural network with minimal energy consumption, often activated after a wake-on-event trigger.

• Techniques Involved: This mode typically employs reduced precision arithmetic (e.g., 8-bit instead of 32-bit), lower clock frequencies, and aggressive clock gating. Some architectures feature a dedicated, minimalist neural processing unit (NPU) for this purpose.
• Design Goal: To minimize the energy-per-inference metric after the wake-up, ensuring the total energy cost of the event (wake-up + inference) remains low.
• Example: A voice-activated device uses a wake-on-audio event from a low-power analog microphone circuit. The awakened MCU then runs a tiny keyword spotting model in its low-power inference mode to determine if the wake-up was justified.

Power gating is a circuit-level technique that uses header or footer switches to completely disconnect the power supply (VDD or GND) to an idle logic block or processor core, eliminating both dynamic and static (leakage) power consumption.

• Relation to Wake-on-Event: In advanced systems, the main processor and large SRAM blocks are often power-gated during deep sleep. The always-on domain contains the control logic to re-engage the power switches upon a wake-up event.
• Contrast with Clock Gating: Clock gating only stops the clock to save dynamic power; power gating is more aggressive and saves leakage power but has a higher latency and energy cost to restore power and context.
• Application: A vision-based IoT camera might have its image signal processor and CNN accelerator power-gated. A passive infrared (PIR) sensor attached to the AON domain triggers a wake-on-event, which then powers up these blocks for full image analysis.

Energy-neutral operation is a system design goal where the long-term average energy consumption is less than or equal to the average energy harvested from the environment (e.g., solar, thermal, RF).

• Enabling Role of Wake-on-Event: Achieving energy neutrality is virtually impossible with continuous sensing or frequent duty cycling. Wake-on-event is a critical technique, as it ensures energy is only spent when a meaningful event occurs, dramatically reducing the average power draw to a level that can be matched by small-scale energy harvesters.
• System Design: Such systems integrate an energy harvesting source, a power management IC for maximum power point tracking (MPPT), a rechargeable buffer (capacitor or thin-film battery), and ultra-low-power logic centered on a wake-on-event architecture.
• Example: A wireless structural health monitor on a bridge uses a piezoelectric harvester from vibrations. It remains in a near-zero-power state until a wake-on-event from an accelerometer threshold detects a vibration worthy of analysis, enabling perpetual operation.