kT/C noise represents the unavoidable, random charge error sampled onto a capacitor whenever a switch is opened. This phenomenon arises from the thermal agitation of charge carriers in the resistive channel of the sampling switch, which generates a broadband white noise voltage. When the switch disconnects, the instantaneous value of this noise is frozen onto the capacitor as a random sample error, setting a fundamental physical limit on the achievable **SNR** of any discrete-time analog system.
Glossary
kT/C Noise

What is kT/C Noise?
kT/C noise is the fundamental thermal noise sampled onto a capacitor during a switched-capacitor operation, setting a physical limit on the signal-to-noise ratio of discrete-time analog circuits.
In the context of RF fingerprinting, this noise adds a unique, non-clonable Gaussian error to every sample captured by an ADC. The magnitude of this error is defined by the equation v_n^2 = kT/C, where k is Boltzmann's constant and T is the absolute temperature. For a given capacitor size, this sets a hard trade-off between noise power and circuit area, making the specific kT/C design choice a permanent, physically-bound component of a device's intrinsic analog signature.
Key Characteristics of kT/C Noise
kT/C noise represents a fundamental, unavoidable thermal noise source in switched-capacitor circuits that sets the maximum achievable signal-to-noise ratio for discrete-time analog systems. Understanding its characteristics is essential for modeling the random, device-specific charge errors exploited in RF fingerprinting.
Fundamental Thermal Origin
kT/C noise arises from the thermal agitation of charge carriers in the non-zero resistance of a sampling switch. During the sampling phase, this resistance generates a broadband Johnson–Nyquist noise voltage. When the switch opens, a random noise sample is frozen onto the capacitor, creating an unpredictable charge error that is independent of the signal. This error is a physical manifestation of the fluctuation-dissipation theorem and cannot be eliminated by circuit design improvements alone.
RMS Voltage and Noise Power
The total mean-squared noise voltage on the capacitor is determined solely by the absolute temperature (T) and the capacitance value (C). Key relationships:
- RMS noise voltage: v_n = √(kT/C)
- Noise charge: Q_n = √(kTC)
- Noise energy: E_n = ½kT This reveals that the noise is independent of the switch resistance (R), as a larger R increases noise spectral density but reduces bandwidth proportionally. For a 1 pF capacitor at 300 K, the RMS noise voltage is approximately 64.4 µV.
Capacitance Dependence and Design Trade-offs
The noise amplitude is inversely proportional to the square root of capacitance, creating critical design trade-offs:
- Doubling C reduces RMS noise by only √2 (≈30%), while doubling power consumption for charging
- Halving C increases noise by √2 but reduces area and power
- Practical range: 0.1 pF (≈204 µV RMS) to 100 pF (≈6.4 µV RMS) at room temperature This forces designers to balance noise performance, power dissipation, and sampling speed, making kT/C noise a key constraint in high-speed, high-resolution data converters.
Statistical Distribution and Sampling
The sampled noise follows a Gaussian probability distribution with zero mean and variance σ² = kT/C. Critical properties:
- Each sampling event captures an independent, identically distributed (IID) random value
- The noise is white and uncorrelated from sample to sample
- The probability of a noise sample exceeding ±3σ is only 0.27%
- For a 1 pF capacitor, the standard deviation is approximately 64.4 µV This Gaussian nature means the noise can be averaged down by oversampling, improving SNR by 3 dB per doubling of the sampling rate.
Impact on ADC Resolution and ENOB
kT/C noise directly limits the achievable Effective Number of Bits (ENOB) in a data converter. For a given full-scale voltage (V_FS) and capacitance:
- Maximum SNR: SNR_max = (V_FS²/2) / (kT/C)
- ENOB limit: ENOB_max = (SNR_dB - 1.76) / 6.02
- Example: A 1 Vpp signal on a 0.5 pF capacitor yields a theoretical maximum SNR of ~73 dB, limiting resolution to approximately 11.8 bits regardless of quantizer precision This establishes a hard physical boundary that distinguishes truly random noise from deterministic quantization error in fingerprinting applications.
Device-Specific Variations and Fingerprinting
Although kT/C noise is fundamentally random, the effective capacitance and operating temperature vary between devices due to:
- Process variations: Oxide thickness and dielectric constant shifts alter actual C values by ±10-15%
- Temperature gradients: Localized heating from adjacent digital circuits raises T, increasing noise power
- Switch non-idealities: Charge injection and clock feedthrough add deterministic offsets to the sampled noise These variations create a device-specific noise pedestal that, while random per sample, exhibits a unique statistical signature in its variance and distribution that can be exploited for hardware authentication.
Frequently Asked Questions
Explore the foundational concepts of kT/C noise, the unavoidable thermal noise sampled onto a capacitor that sets the ultimate signal-to-noise ratio limit in switched-capacitor circuits and analog-to-digital converters.
kT/C noise is the thermal noise sampled onto a capacitor during a switched-capacitor operation, with a total mean-square voltage of exactly kT/C (where k is Boltzmann's constant and T is absolute temperature). It is fundamental because it arises from the thermal agitation of charge carriers in the switch's channel resistance, and unlike other noise sources, it cannot be eliminated by improving the switch design—it is a physical limit set by the capacitor size and temperature. Every time a switch turns off, it captures a random sample of this noise onto the holding capacitor, creating an unavoidable random charge error that adds to each sample. This noise is independent of the switch's on-resistance value because the integrated noise power spectral density over the RC bandwidth always simplifies to kT/C, making it a universal constraint in discrete-time analog systems.
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Related Terms
Explore the core analog and converter non-idealities that interact with and are often limited by kT/C noise, forming the basis of unique hardware fingerprints.
Thermal Noise Floor
The broadband, unavoidable noise generated by the random thermal agitation of charge carriers in resistive components. It sets the fundamental limit for signal detection and contributes a Gaussian, device-specific noise pedestal to the fingerprint.
- Directly related to kT/C noise in sampled circuits
- Sets the absolute minimum detectable signal
- Contributes a unique noise power spectral density per device
Quantization Noise Floor
The broadband noise-like power resulting from the inherent rounding of an analog signal to a finite number of discrete levels. Its spectral shape is modified by the converter's non-idealities and sampling imperfections.
- Interacts with kT/C noise to set total SNR
- Shaped by converter architecture (e.g., sigma-delta)
- Statistical properties reveal DNL and INL signatures
Sample-and-Hold Amplifier (SHA)
A critical front-end circuit that captures an instantaneous analog value and holds it steady for the subsequent quantizer. Its non-idealities are primary sources of a digitizer's unique signature.
- Pedestal error: Charge injection offset
- Droop: Voltage decay during hold mode
- Aperture jitter: Timing uncertainty in sampling instant
- The sampling capacitor's size directly sets the kT/C noise floor
Process-Voltage-Temperature (PVT) Variation
The collective impact of manufacturing process shifts, supply voltage fluctuations, and operating temperature changes on circuit performance. This defines the statistical distribution of hardware impairments that make each device unique.
- Process variation sets the capacitor mismatch floor
- Temperature directly modulates kT/C noise power (∝ T)
- Voltage ripple couples through finite PSRR
Flicker Noise
A low-frequency noise phenomenon, also known as 1/f noise, caused by traps in semiconductor interfaces. It introduces a slow, random drift in a device's DC offset and bias points.
- Dominates at low frequencies, complementing white kT/C noise
- Contributes a slowly varying component to the fingerprint
- Highly process-dependent, making it a strong device identifier
Power Supply Rejection Ratio (PSRR)
A measure of a circuit's ability to suppress ripple and noise present on its power supply rail from appearing at its output. Poor PSRR allows supply variations to modulate the signal.
- Creates an environmentally-coupled fingerprint
- Supply noise can alias into the signal band during sampling
- Interacts with kT/C noise by adding a deterministic, power-supply-dependent error component

About the author
Prasad Kumkar
CEO & MD, Inference Systems
Prasad Kumkar is the CEO & MD of Inference Systems and writes about AI systems architecture, LLM infrastructure, model serving, evaluation, and production deployment. Over 5+ years, he has worked across computer vision models, L5 autonomous vehicle systems, and LLM research, with a focus on taking complex AI ideas into real-world engineering systems.
His work and writing cover AI systems, large language models, AI agents, multimodal systems, autonomous systems, inference optimization, RAG, evaluation, and production AI engineering.
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