The Advanced Configuration and Power Interface (ACPI) is an open industry specification that defines a standardized interface for operating system-directed configuration, power management, and thermal management of computer hardware. It replaces legacy BIOS interfaces, providing the OS with direct control over hardware power states via ACPI tables stored in system firmware. This enables sophisticated, policy-based management of Performance States (P-States) and Power States (C-States) for processors and devices.
Glossary
Advanced Configuration and Power Interface (ACPI)

What is Advanced Configuration and Power Interface (ACPI)?
The Advanced Configuration and Power Interface (ACPI) is an open industry standard that defines power management and configuration interfaces between an operating system and platform firmware, enabling OS-directed power states for processors, devices, and entire systems.
ACPI's primary mechanism is a hierarchical namespace that describes system hardware, power resources, and supported control methods. The OS interacts with this namespace to execute ACPI Machine Language (AML) bytecode, triggering hardware transitions. This standard is foundational for modern power-saving features like sleep (S3), hibernate (S4), and soft off (S5) states, as well as dynamic thermal management. It is a critical component for power budgeting and thermal throttling in systems with constrained resources, such as those utilizing Neural Processing Units (NPUs).
Key Components of ACPI
The Advanced Configuration and Power Interface (ACPI) is an open standard enabling operating system-directed power management. Its core components define the interfaces and states that allow software to control hardware power consumption and thermal behavior.
Differentiated System Description Table (DSDT)
The Differentiated System Description Table (DSDT) is the primary ACPI table containing the Definition Block for the base system. It is a persistent, compiled ACPI Machine Language (AML) bytecode table that describes:
- All system hardware (buses, devices, interrupts).
- The Power Management (PM) profile for the platform.
- The supported sleep states and power resources.
The operating system's ACPI driver interprets the DSDT's AML code to understand the platform's hardware configuration and the methods available to control it. It is loaded during boot and remains resident in memory.
Performance States (P-States)
Performance States (P-States) are ACPI-defined operational modes for a processor core that allow the OS to dynamically balance performance and power consumption. Key characteristics include:
- P0 is the highest-performance state (maximum voltage/frequency).
- P1, P2, P3... are successively lower-performance, more efficient states.
- Transitions are controlled by the OS power policy driver.
P-States are implemented using Dynamic Voltage and Frequency Scaling (DVFS). The OS selects a P-State based on CPU utilization, thermal conditions, and power policy (e.g., balanced vs. performance).
Processor Power States (C-States)
Processor Power States (C-States) are ACPI-defined idle sleep states for a processor core, enabling power savings during periods of inactivity by turning off internal circuits.
- C0: Active state; the core is executing instructions.
- C1 (Halt): Core clock is gated; quick exit latency.
- C2 (Stop-Clock): Core clocks are stopped; lower power than C1.
- C3 (Sleep): Core's caches are flushed and powered down; significant latency.
- C6+ (Deep Sleep): Core voltage is reduced to near-zero; state is saved to SRAM; longest exit latency.
Deeper C-States save more leakage power but incur higher wake-up latency. The OS idle scheduler decides when to enter deeper states.
Device Power States (D-States)
Device Power States (D-States) define the power management states for individual system devices (e.g., PCIe, USB, SATA controllers).
- D0: Fully powered on and operational.
- D1, D2: Intermediate low-power states; device context may be partially lost.
- D3 (Subdivided into D3hot and D3cold):
- D3hot: Device is soft-off; main power rail is on, enabling a software-initiated wake-up.
- D3cold: Device is completely powered off; requires a full re-initialization to wake (e.g., via a wake signal).
The OS device driver, in coordination with the ACPI subsystem, manages transitions between D-States based on device usage.
System Power States (S-States & G-States)
ACPI defines global system sleep states that affect the entire platform.
Sleeping States (S-States):
- S1: CPU clocks stopped; RAM refreshed; quick resume.
- S2: CPU powered off; RAM refreshed.
- S3 (Suspend-to-RAM): System state saved in DRAM; most components powered off; low-power, fast resume.
- S4 (Suspend-to-Disk / Hibernation): System state saved to non-volatile storage; platform powered off; slower resume.
- S5 (Soft Off): System is off; requires full boot sequence.
Global States (G-States):
- G0 (S0): Working state.
- G1: Sleeping state (S1-S4).
- G2 (S5): Soft Off.
- G3: Mechanical Off (AC power disconnected).
ACPI Thermal Model
The ACPI thermal model provides a standard interface for the OS to monitor and manage platform temperature. Its key objects include:
- Thermal Zones: Represent a discrete physical area of the platform (e.g., CPU package, GPU).
- Thermal Sensors: Report current temperature within a zone.
- Passive Cooling: OS-initiated cooling (e.g., lowering P-States, throttling performance). Defined by
_PSV(Passive Trip Point) and_TC1/TC2(thermal constants). - Active Cooling: Hardware cooling (e.g., fan control). Defined by
_ACx(Active Trip Points) and_ALx(Active Cooling Levels). - Critical Trip Point (
_CRT): Temperature at which the system must perform a hardware shutdown to prevent damage.
This model enables Dynamic Thermal Management (DTM) where the OS reacts to thermal events by invoking cooling policies.
How ACPI Works: The Interface Between OS and Firmware
The Advanced Configuration and Power Interface (ACPI) is the fundamental standard enabling modern operating systems to directly manage hardware power states and configuration.
The Advanced Configuration and Power Interface (ACPI) is an open industry standard that defines power management and hardware configuration interfaces between an operating system and a computer's firmware (BIOS/UEFI). It enables OS-directed power management, allowing the system software to place the CPU, devices, and the entire platform into various low-power sleep states (like S3 Suspend-to-RAM) or performance states (P-states) based on policy and activity. This shifts control from legacy, static firmware-based power management to a dynamic, policy-driven model.
ACPI operates through a set of definitional tables provided by the firmware, most importantly the Differentiated System Description Table (DSDT). These tables, written in ACPI Source Language (ASL), describe the system's hardware topology and the methods to control it. The OS interprets these tables and executes the contained methods, which are low-level operations that trigger hardware-specific actions via the ACPI Machine Language (AML) bytecode. This abstraction allows a single OS kernel to manage power and discover devices across vastly different hardware platforms without custom drivers for every chipset.
ACPI Power States: System, Device, and Processor
A comparison of the hierarchical power states defined by the Advanced Configuration and Power Interface (ACPI) standard, showing the scope and depth of power management for different system components.
| State Type & Name | Scope / Domain | Primary Purpose | Typical Power Savings | Exit Latency |
|---|---|---|---|---|
System States (S-States) | Entire Platform (excluding RTC) | System-wide sleep/suspend |
| Seconds to tens of seconds |
S0 (Working) | System | Fully active, OS running | 0% (baseline) | < 1 ms |
S1 | System | Shallow sleep, CPU caches maintained | Low | < 2 ms |
S2 | System | Deeper sleep, CPU caches lost | Moderate | Tens of ms |
S3 (Suspend-to-RAM) | System | System context saved to DRAM, most power off | High (> 95%) | Hundreds of ms |
S4 (Suspend-to-Disk / Hibernation) | System | System context saved to non-volatile storage, power off | ~100% | Seconds |
S5 (Soft Off) | System | System is off, requires full boot | ~100% | Tens of seconds (boot) |
Device States (D-States) | Individual Device (e.g., PCIe, USB) | Peripheral power management | Varies by device | Varies by state |
D0 (Fully On) | Device | Device fully operational | 0% (baseline) | N/A |
D1 | Device | Device-specific light sleep | Low | Low |
D2 | Device | Device-specific intermediate sleep | Moderate | Moderate |
D3 (Off) | Device | Device powered off (D3hot: aux power, D3cold: no power) | High to ~100% | High (may need re-initialization) |
Processor States (C-States) | Processor Core / Package | Core idle management | Reduces leakage (static) power | Microseconds to milliseconds |
C0 (Active) | Core | Core executing instructions | 0% (baseline) | N/A |
C1 (Halt) | Core | Core halted, minimal wake latency | Very Low | < 1 µs |
C1E (Enhanced Halt) | Core | Core halted, reduced voltage/frequency | Low | ~10 µs |
C2 (Stop-Clock) | Core/Module | Clocks stopped, core caches maintained | Moderate | Tens of µs |
C3 (Sleep) | Core/Module | Clocks stopped, caches flushed | High | ~100 µs |
C6 (Deep Power Down) | Core | Core power-gated, state saved to SRAM | Very High | Hundreds of µs |
C7/C8 (Deeper) | Package/Core | Package-level power gating | Maximum | Milliseconds |
Processor Performance States (P-States) | Processor Core | Active performance scaling | Reduces dynamic power (CV²f) | Microseconds |
P0 (Max Perf) | Core | Maximum voltage/frequency | 0% savings (baseline) | N/A |
P1...Pn | Core | Reduced voltage/frequency operating points | Scales with V²f reduction | < 10 µs |
Frequently Asked Questions
The Advanced Configuration and Power Interface (ACPI) is the open standard that enables operating systems to manage power, performance, and thermal states of modern hardware. These FAQs address its core mechanisms, relationship to NPU acceleration, and practical implementation for embedded and power-constrained systems.
The Advanced Configuration and Power Interface (ACPI) is an open industry specification that defines a standardized interface for operating system-directed configuration, power management, and thermal management of computer hardware. It works by providing the OS with a hierarchical, table-based description of the platform's hardware components and a set of control methods, written in ACPI Machine Language (AML), that the OS can execute to query status and initiate power state transitions. This abstraction allows a single OS driver to manage diverse hardware by interacting with the firmware's ACPI tables, such as the Differentiated System Description Table (DSDT), rather than requiring proprietary drivers for every chipset.
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Related Terms
ACPI operates within a broader ecosystem of hardware and software interfaces designed for power and thermal control. These related terms define the specific mechanisms and metrics that enable OS-directed power management.
Performance States (P-States)
P-States are ACPI-defined operational modes for a processor core that allow the operating system to dynamically adjust its voltage and frequency. Each P-State represents a specific performance level, with P0 being the highest performance (and power) state. The OS uses P-State transitions to match processor capability to the instantaneous workload, saving energy during periods of low demand. This is a primary mechanism for implementing Dynamic Voltage and Frequency Scaling (DVFS).
Power States (C-States)
C-States are ACPI-defined idle sleep states for a processor core, ranging from C0 (fully active) to deeper states like C3 or C6. As the C-State number increases, more of the core's internal circuits are powered down to reduce leakage power, but the latency to wake back to C0 also increases. The OS places idle cores into progressively deeper C-States to minimize static power dissipation. C-States manage power when there is no work to do, complementing P-States which manage power during active execution.
Dynamic Voltage and Frequency Scaling (DVFS)
DVFS is the foundational hardware technique implemented through ACPI P-States. It dynamically adjusts a processor's operating voltage and clock frequency in response to real-time computational load. Lowering the frequency allows a proportional reduction in voltage, which yields a cubic reduction in dynamic power (P ∝ C * V² * f). DVFS is the primary method for optimizing the performance per watt of a system under variable workloads.
Power Management Unit (PMU)
A Power Management Unit is a dedicated hardware controller, often a microcontroller embedded within a System-on-Chip (SoC), that executes low-level power sequences. The PMU acts as the physical enforcer for ACPI commands. When the OS requests a P-State or C-State transition via ACPI, the PMU handles the precise timing of voltage regulator adjustments, clock gating, and power gate switching. It is the critical bridge between ACPI software policy and hardware power controls.
Thermal Throttling
Thermal throttling is a protective mechanism triggered when a processor's temperature exceeds a safe threshold. While often managed independently by hardware, ACPI provides standardized interfaces (e.g., Thermal Zones) for the OS to participate. Throttling typically forces the processor into a lower P-State, reducing frequency and voltage to decrease power dissipation and allow the cooling system to recover. It is a reactive safeguard to prevent damage, distinct from proactive DVFS for efficiency.
Running Average Power Limit (RAPL)
RAPL is an Intel-specific hardware interface that provides software with the ability to monitor and enforce power consumption limits for processor packages, DRAM, and other domains over a specified time window. While not part of the core ACPI specification, RAPL often operates alongside it. The OS or a performance manager can use RAPL data to inform ACPI P-State decisions, ensuring the system stays within a defined power budget or Thermal Design Power (TDP) envelope.

About the author
Prasad Kumkar
CEO & MD, Inference Systems
Prasad Kumkar is the CEO & MD of Inference Systems and writes about AI systems architecture, LLM infrastructure, model serving, evaluation, and production deployment. Over 5+ years, he has worked across computer vision models, L5 autonomous vehicle systems, and LLM research, with a focus on taking complex AI ideas into real-world engineering systems.
His work and writing cover AI systems, large language models, AI agents, multimodal systems, autonomous systems, inference optimization, RAG, evaluation, and production AI engineering.
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