Thermal Relaxation Time

Thermal relaxation follows an exponential decay profile where the junction temperature difference from ambient decreases by approximately 63.2% per time constant. After 5 time constants, the device reaches over 99% of equilibrium. This behavior is governed by the product of thermal resistance (Rth) and thermal capacitance (Cth) of the die, attach, and package layers.

Real semiconductor devices exhibit multiple relaxation time constants corresponding to distinct physical layers:

• Die-level: Microsecond to millisecond range, dominated by the transistor channel's intimate thermal capacitance
• Die-attach layer: Millisecond range, reflecting the bonding material's thermal impedance
• Package/heat spreader: Tens of milliseconds to seconds
• Heat sink to ambient: Seconds to minutes, the slowest thermal domain

This multi-stage behavior creates a distributed thermal memory that cannot be captured by a single time constant.

Thermal relaxation time is directly extracted from the transient thermal impedance curve (Zth) . When a power step is removed, the cooling transient reveals the device's thermal time-constant spectrum through:

• Structure function analysis: Transforming the Zth curve to identify discrete RC stages
• Foster-to-Cauer conversion: Mapping behavioral time constants to physical layer contributions

The relaxation time constants are the poles of the thermal transfer function and define the frequency range where thermal memory effects distort the modulated signal envelope.

Thermal relaxation time determines the memory span of envelope-induced distortion:

• Short τ (< 1 ms): Affects wideband signals with fast envelope variations; causes intra-symbol thermal distortion
• Long τ (> 100 ms): Creates slow bias point drift that modulates gain over multiple transmission frames
• Intermediate τ (1–100 ms): Falls within the envelope bandwidth of LTE/NR signals, making it the most critical range for DPD compensation

The convolution of the signal envelope power with the thermal impulse response produces a temperature waveform that dynamically shifts the PA's AM-AM and AM-PM characteristics.

Thermal relaxation time is experimentally characterized using pulsed I-V or pulsed S-parameter measurements:

• A long heating pulse brings the device to steady-state junction temperature
• The quiescent period after pulse removal is varied to observe the cooling trajectory
• Isothermal conditions are maintained by keeping the pulse width shorter than the thermal time constant during standard characterization

Pulsed-RF measurements with varying duty cycles can isolate the thermal contribution from trapping effects by exploiting their distinct relaxation time signatures.

Thermal relaxation time varies significantly by semiconductor material:

• GaN HEMT: Higher thermal conductivity of SiC substrate yields faster die-level relaxation (sub-μs), but buffer trapping introduces thermally-activated slow components
• GaAs HBT: Lower substrate thermal conductivity produces longer relaxation times, with the self-heating effect more tightly coupled to the instantaneous collector current
• Si LDMOS: Moderate thermal relaxation dominated by the package interface rather than the die itself

These material-specific relaxation profiles demand tailored thermal memory models for accurate DPD coefficient estimation.