Foster Thermal Model

The Foster model represents thermal impedance as a series connection of parallel resistor-capacitor (RC) pairs. Each stage contributes an exponential term to the transient response. The mathematical form is:

Z_th(t) = Σ R_i [1 - exp(-t / τ_i)]

• R_i: Thermal resistance of the i-th stage (K/W)
• C_i: Thermal capacitance of the i-th stage (J/K)
• τ_i = R_i × C_i: Time constant of the i-th stage

The model captures multiple time constants spanning from microseconds to seconds, reflecting the distributed nature of heat flow.

Unlike the Cauer thermal model, Foster network components have no direct physical meaning. The resistors and capacitors are mathematical fitting parameters, not representations of specific material layers.

• Foster model: Behavioral curve-fit to measured Z_th data
• Cauer model: Physically maps to die attach, substrate, and heat sink layers
• Foster nodes are internal mathematical constructs — intermediate node voltages do not correspond to measurable physical temperatures

This abstraction makes the Foster model simpler to extract from measurements but unsuitable for structural thermal analysis.

Foster parameters are extracted from measured cooling or heating curves obtained via:

• Junction temperature sensing using the device's own temperature-sensitive electrical parameter (TSEP), such as forward voltage drop
• Step response analysis: Applying a known power dissipation step and recording the junction temperature rise over time
• Curve fitting: Fitting the sum-of-exponentials model to the measured Z_th(t) curve using nonlinear least-squares optimization

Typical extractions yield 3 to 5 Foster stages, with time constants distributed logarithmically across the thermal bandwidth of interest.

The Foster model can be expressed in the frequency domain as a thermal impedance transfer function:

Z_th(s) = Σ [R_i / (1 + s·τ_i)]

• Low frequencies: Z_th approaches the sum of all R_i (steady-state thermal resistance)
• High frequencies: Z_th rolls off as thermal capacitance shunts heat flow
• The thermal cutoff frequency of each stage is f_c,i = 1 / (2π·τ_i)

This frequency-domain form is essential for predicting junction temperature modulation by the envelope frequency of communication signals.

In thermal-aware digital predistortion, the Foster model serves as the thermal kernel for estimating instantaneous junction temperature from power dissipation history:

• Input: Instantaneous dissipated power P_diss(t)
• Convolution: T_j(t) = T_amb + P_diss(t) ∗ Z_th(t)
• Output: Estimated junction temperature used to index temperature-dependent DPD coefficients

This enables thermal memory compensation by adjusting predistorter gain and phase correction as a function of the signal envelope's thermal history, reducing thermal-induced spectral asymmetry.

The Foster model has several inherent limitations:

• No physical extrapolation: Cannot predict thermal behavior outside the measured range of operating conditions
• Non-causal in time domain: Direct Foster-to-Cauer transformation can yield negative component values if not properly constrained
• Temperature-invariant assumption: Standard Foster parameters assume constant material properties, though thermal conductivity of GaN and SiC varies with temperature
• Boundary condition sensitivity: Extracted parameters depend on the thermal boundary conditions during measurement (cold plate temperature, airflow)

For finite element co-simulation, the Cauer model is preferred due to its physical correspondence.

The physical counterpart to the Foster model. Unlike the Foster network's behavioral fit, the Cauer model represents actual material layers—die, attach, substrate, heat sink—as a ladder of capacitors connected to ground. Each RC stage maps directly to a physical thermal resistance and capacitance. This makes the Cauer model suitable for finite element co-simulation and structural optimization, whereas the Foster model is preferred for rapid behavioral extraction from measured transient thermal response curves.

The fundamental transfer function captured by the Foster model. Thermal impedance defines the dynamic relationship between power dissipation (P_diss) and junction temperature rise (ΔT_j) as a function of frequency or time. Key characteristics:

• Static R_th: Steady-state temperature rise per watt
• Dynamic Z_th(t): Transient heating curve used to extract Foster RC parameters
• Frequency domain Z_th(f): Reveals thermal filtering of envelope-frequency heating The Foster network provides a curve-fit to measured Z_th data using multiple exponential terms.

The process of deconvolving a measured transient thermal response into discrete exponential terms, each characterized by a time constant (τ = R_th × C_th) and an amplitude. Methodology:

• Apply a step power pulse and record the cooling transient
• Perform multi-exponential fitting using least-squares optimization
• Map extracted time constants to Foster network RC pairs
• Typical GaN HEMT devices exhibit time constants spanning microseconds to seconds, reflecting die-level self-heating through package-level thermal lag.

A coupled simulation framework where the Foster or Cauer thermal network is solved simultaneously with the transistor's nonlinear electrical model. At each time step:

1. Instantaneous power dissipation is calculated from drain voltage and current
2. Power drives the thermal network to compute junction temperature
3. Temperature updates threshold voltage, mobility, and gain in the electrical model This closed-loop simulation captures thermal AM-AM and AM-PM distortion that memoryless models miss.

An augmented behavioral model that extends the standard memory polynomial with low-frequency terms specifically designed to capture thermal lag. Structure:

• Standard terms: Capture high-frequency electrical memory (ns–µs range)
• Thermal augmentation: Additional taps with large delay spacing (µs–ms range) to model slow temperature dynamics
• Cross terms: Interactions between instantaneous envelope power and thermal state This approach embeds the Foster model's effect directly into the digital predistortion coefficient space without explicit temperature sensing.

The experimental technique used to characterize a device for Foster model extraction. Procedure:

• Drive the transistor with a pulsed power stimulus while monitoring a temperature-sensitive electrical parameter (TSEP), typically the body diode forward voltage
• Record the heating and cooling transients with high-speed sampling
• Apply structure function analysis to deconvolve the thermal impedance profile
• Fit the resulting curve to a Foster network of 3–5 RC stages for behavioral modeling accuracy.