Gain Mismatch

In a properly designed Doherty amplifier, the carrier and peaking paths must exhibit a specific gain relationship to achieve correct load modulation. Gain mismatch occurs when the small-signal or large-signal gain of the peaking branch deviates from its design target relative to the carrier branch. This deviation is typically caused by:

• Transistor process variation between carrier and peaking devices
• Unequal thermal operating points altering transconductance
• Bias network inaccuracies shifting the quiescent point
• Impedance transformation errors in the input matching networks

The result is an incorrect current injection ratio at the Doherty combiner, preventing the impedance inverter from presenting the optimal load to the carrier amplifier across the dynamic power range.

The fundamental operating principle of the Doherty architecture relies on precise active load-pull where the peaking amplifier's injected current actively modulates the impedance seen by the carrier. Gain mismatch directly corrupts this mechanism:

• Under-driven peaking: If peaking gain is too low, insufficient current reaches the combiner, causing the carrier to see a higher-than-optimal impedance and saturate prematurely
• Over-driven peaking: If peaking gain is too high, excessive current forces the carrier impedance too low, compressing its voltage swing and reducing efficiency
• Phase-dependent interaction: Gain mismatch often couples with phase misalignment, creating complex frequency-dependent impedance trajectories that deviate from the ideal constant-efficiency contour

The impedance presented to the carrier amplifier fails to follow the optimal trajectory from high-efficiency at back-off to full power, collapsing the efficiency curve.

The primary benefit of the Doherty architecture is maintaining high power-added efficiency (PAE) over a wide output back-off (OBO) range. Gain mismatch erodes this advantage through:

• Premature saturation: The carrier amplifier saturates before the peaking amplifier fully activates, creating a dip in efficiency at the transition point
• Incomplete load modulation: The carrier never experiences the full impedance reduction required to maintain voltage swing at peak efficiency
• Excessive peaking leakage: At low power levels where the peaking amplifier should be off, gain mismatch can cause unintended conduction, wasting DC power

Typical measured impact: A 1 dB gain mismatch can reduce the 6 dB back-off efficiency by 5-10 percentage points, negating the Doherty advantage over a standard Class-AB design.

Gain mismatch introduces nonlinear distortion that is more complex and dynamic than the intrinsic AM-AM and AM-PM of the individual amplifier stages. This places a heavier burden on the digital predistortion (DPD) system:

• Expanded dynamic range requirement: The DPD must correct for the composite nonlinearity created by the mismatched combining process, which exhibits sharper discontinuities at the transition point
• Increased memory depth: The interaction between gain mismatch and thermal memory effects creates long-term dynamic distortions requiring higher-order memory polynomial terms
• Wider correction bandwidth: The nonlinear interaction generates intermodulation products that extend further into adjacent channels, demanding DPD with 5-7x signal bandwidth for adequate adjacent channel leakage ratio (ACLR) correction
• Coefficient sensitivity: The predistorter coefficients become more sensitive to temperature and frequency variations, requiring more frequent adaptation cycles

In practice, gain mismatch can increase the required DPD model complexity by 30-50% to achieve the same ACLR target.

Gain mismatch produces characteristic signatures in the amplifier's AM-AM and AM-PM distortion curves that differ from single-stage amplifier nonlinearity:

• AM-AM kink: A visible inflection or 'kink' appears in the gain compression curve at the transition point where the peaking amplifier begins to conduct, caused by the abrupt change in effective gain as the mismatched peaking path activates
• AM-PM discontinuity: A sharp phase step occurs at the same transition point because the peaking amplifier's phase response differs from the carrier's, and the mismatch alters the vector summation at the combiner
• Hysteresis in dynamic measurements: When measured with modulated signals, the distortion curves exhibit hysteresis loops due to the interaction between gain mismatch and memory effects, particularly self-heating and trap effects in GaN HEMT devices
• Asymmetry in upper/lower sidebands: The spectral regrowth becomes asymmetric, with the upper and lower adjacent channels showing different ACLR levels, complicating regulatory compliance

These signatures are diagnostic indicators used during load-pull analysis and model extraction to identify and quantify gain mismatch.

Addressing gain mismatch requires intervention at multiple stages of the amplifier design and operational lifecycle:

• Input splitting network design: Asymmetric power dividers with precisely calibrated attenuation or gain equalization pads compensate for known gain differences between carrier and peaking paths
• Gate bias tuning: Independent adjustment of carrier and peaking gate bias voltages during final test can trim small-signal gain to match, though this must be balanced against efficiency and linearity trade-offs
• Digital gain compensation: Applying independent digital gain coefficients in the DPD signal path before the predistorter can numerically equalize the branch gains, though this does not correct the underlying analog mismatch at the combiner
• Adaptive alignment algorithms: Closed-loop calibration routines that monitor error vector magnitude (EVM) or ACLR and iteratively adjust per-branch gain and phase in the transmit path
• Monolithic integration: Using MMIC implementations where carrier and peaking transistors are fabricated on the same die minimizes process variation and thermal gradient-induced mismatch

A load-modulated amplifier architecture combining a main carrier device (Class-AB) and an auxiliary peaking device (Class-C) to achieve high efficiency over a wide range of output power back-off levels. The fundamental operation relies on a precise gain ratio between these two paths; any deviation constitutes a gain mismatch that degrades the active load-pull effect.

The dynamic impedance transformation mechanism where the peaking amplifier's current injection actively varies the impedance seen by the carrier amplifier. Proper load modulation requires the peaking amplifier to turn on at the correct threshold with the correct current magnitude. Gain mismatch disrupts this timing and magnitude relationship, preventing the carrier from seeing the optimal impedance trajectory and collapsing efficiency at back-off.

The critical calibration of electrical path lengths at the input and output of the carrier and peaking branches to ensure constructive in-phase power combining at the Doherty combiner. While distinct from gain mismatch, phase misalignment compounds the problem. A combined gain and phase mismatch creates a vector error at the summing node, resulting in incomplete power combining and severe AM-AM/AM-PM distortion.

Amplitude-to-amplitude modulation distortion representing the nonlinear relationship between input and output signal envelope magnitudes. Gain mismatch directly manifests as a deviation from the ideal AM-AM profile of the Doherty amplifier. Instead of a smooth, linearized response, the mismatch creates a kink or discontinuity at the transition point where the peaking amplifier engages, increasing the burden on digital predistortion.

Amplitude-to-phase modulation distortion where the phase shift introduced by the amplifier varies with the instantaneous input envelope. In a Doherty architecture, gain mismatch alters the impedance presented to the carrier's intrinsic output capacitance, causing an unintended phase modulation that varies with drive level. This creates a complex, envelope-dependent phase error that must be corrected by the DPD system.

The power-added efficiency when operating at an average output power significantly below saturation. The Doherty architecture is specifically designed to maintain high efficiency at 6-10 dB output back-off (OBO). Gain mismatch directly erodes this efficiency peak by causing the load modulation to occur at the wrong power level, forcing the carrier amplifier to operate with a suboptimal load line and dissipate excess DC power as heat.