Back-Off Efficiency

The bias point fundamentally dictates the theoretical efficiency curve versus back-off.

• Class-A: Constant current draw yields efficiency that drops linearly with output power. At 10 dB back-off, efficiency is a dismal 5-10%.
• Class-B: Current is proportional to signal envelope, giving efficiency that scales with the square root of back-off. At 10 dB back-off, efficiency is approximately 15-25%.
• Class-C: Conduction angle less than 180° provides higher peak efficiency but extreme nonlinearity, requiring heavy linearization.
• Deep Class-AB: The most common compromise for linearity-efficiency trade-off in carrier amplifiers.

Doherty amplifier topology is the dominant technique for maintaining high efficiency at back-off. The mechanism relies on active load-pull:

• As the peaking amplifier (biased Class-C) turns on during signal peaks, its injected current varies the impedance seen by the carrier amplifier.
• This dynamic impedance transformation keeps the carrier amplifier operating near its voltage saturation point, maintaining high efficiency over a 6-10 dB back-off range.
• The impedance inverter (quarter-wave transformer) is critical: it converts the decreasing impedance at the combiner to an increasing impedance at the carrier, enabling the active load-pull effect.
• Asymmetric Doherty designs with larger peaking devices extend the high-efficiency back-off range beyond 9 dB for signals with extreme PAPR.

The semiconductor material and device structure directly impact back-off efficiency through knee voltage, parasitics, and thermal behavior:

• GaN HEMT: Wide bandgap enables high voltage operation (28-48V), low knee voltage, and low parasitic capacitance. Superior for high-efficiency Doherty designs with soft compression characteristics amenable to DPD.
• LDMOS: Cost-effective but higher parasitic output capacitance limits broadband performance and efficiency at higher frequencies.
• GaAs HEMT: Excellent for mmWave applications but lower power density than GaN.
• Knee voltage is critical: a lower knee voltage allows the transistor to swing closer to zero voltage, maximizing fundamental-frequency output power and efficiency at back-off.
• Soft compression behavior in GaN devices creates a smoother AM-AM characteristic that is more easily linearized than the hard clipping of some LDMOS processes.

Intentional termination of harmonic frequencies shapes the intrinsic voltage and current waveforms to maximize fundamental-frequency power and minimize dissipation:

• Class-F/F⁻¹: Terminating harmonics with specific short/open impedances squares the voltage waveform (Class-F) or current waveform (Class-F⁻¹), reducing overlap and increasing theoretical efficiency to 100%.
• Continuous Mode amplifiers (Class-J, Class-B/J) relax the precise harmonic termination requirement, allowing a range of reactive fundamental and second-harmonic impedances that maintain efficiency over wider bandwidths.
• In a Doherty context, harmonic terminations must be maintained across the dynamic impedance range created by load modulation, requiring careful design of the Doherty combiner to present correct harmonic impedances at both the carrier and peaking reference planes.
• Proper second-harmonic termination can improve back-off efficiency by 5-10 percentage points compared to an unmatched harmonic case.

The PAPR of the transmitted waveform directly determines the required back-off level and thus the achievable average efficiency:

• Legacy 3G/4G signals: PAPR of 8-10 dB after crest factor reduction, allowing Doherty amplifiers to operate near their peak efficiency back-off point.
• 5G NR signals: Wider bandwidths (100 MHz+) and higher-order modulation (256-QAM, 1024-QAM) produce PAPR of 10-13 dB, pushing amplifiers deeper into back-off where efficiency degrades.
• OFDM-based waveforms: Inherently high PAPR due to the summation of multiple independent subcarriers, requiring aggressive crest factor reduction (CFR) before the power amplifier.
• The relationship is direct: every 1 dB increase in PAPR forces approximately 1 dB additional back-off, which can reduce PAE by 3-8 percentage points depending on the amplifier architecture.
• Envelope tracking (ET) can decouple this relationship by dynamically adjusting the drain supply voltage to track the instantaneous envelope, maintaining high efficiency across the entire PAPR range.

Dynamic memory phenomena cause the amplifier's instantaneous efficiency to deviate from static predictions, particularly at back-off:

• Self-heating effect: As dissipated power varies with the signal envelope, the transistor channel temperature modulates, causing transient gain and phase shifts with time constants of microseconds to milliseconds. This shifts the optimal load line away from the designed impedance, degrading back-off efficiency.
• Gate lag and drain lag: Charge trapping in surface states and buffer layers (especially in GaN HEMTs) introduces slow time constants (milliseconds to seconds) that cause the amplifier's quiescent bias point to wander, altering the conduction angle and thus the efficiency curve.
• Thermal memory is particularly problematic in Doherty amplifiers because the carrier and peaking devices dissipate power at different times during the signal cycle, creating asymmetric thermal profiles that distort the load modulation timing.
• Compensation requires digital predistortion with memory polynomial or Volterra series models that include cross-terms between instantaneous envelope and thermal state variables.