Fault Injection Attack

Clock glitching involves injecting transient disturbances into the device's clock signal. By briefly speeding up or pausing the clock, the attacker aims to cause timing violations within the processor's execution pipeline.

• Mechanism: A glitch generator is connected to the external clock pin, inserting extra clock edges or stretching/shortening clock cycles.
• Target: Often used to skip critical security instructions, such as a password comparison (if (password == stored_password)) or a signature verification check.
• Example: A single-cycle glitch during a conditional jump instruction can cause the processor to execute the wrong branch, bypassing a failure path.

Voltage glitching manipulates the power supply voltage to the microcontroller core or I/O pins. A precise, short-duration drop or spike in voltage can cause transistors to operate incorrectly, leading to bit flips in registers or memory.

• Mechanism: A voltage glitcher is attached to the VCC or VDD pin, injecting sub-nanosecond to microsecond disturbances.
• Target: Effective against cryptographic operations and secure boot sequences. A glitch during a memory read/write can corrupt a single bit in a status register or a cryptographic key.
• Example: Inducing a fault during an AES round computation can enable Differential Fault Analysis (DFA), where analyzing faulty and correct ciphertexts reveals the secret key.

Electromagnetic Fault Injection (EMFI) uses a focused electromagnetic pulse, generated by a coil or antenna placed near the chip's surface, to induce transient faults without direct electrical contact.

• Mechanism: The EM pulse creates localized current surges within the silicon, disrupting transistor states. The effect is highly localized, allowing targeting of specific functional blocks (e.g., the ALU or a specific memory cell).
• Target: Ideal for attacking systems with no exposed electrical contacts. Used to fault cryptographic co-processors, secure elements, and specific instructions.
• Precision: Modern EMFI setups can target areas as small as 50µm, requiring detailed chip decapsulation and spatial profiling.

Optical Fault Injection uses a focused laser beam, typically from an infrared laser, to induce photoelectric effects in the chip's silicon substrate. This is the most spatially precise fault injection method.

• Mechanism: The laser photon energy generates electron-hole pairs, creating localized current spikes that can flip memory bits or alter logic gate outputs. The chip package must be decapsulated for optical access.
• Target: Can target individual transistors, registers, or SRAM cells. Used for extremely precise attacks, such as flipping a single bit in a security fuse or modifying a program counter.
• Capability: Allows for data remanence attacks on SRAM and can be synchronized with clock cycles for instruction-level control.

Temperature-induced faults exploit the fact that semiconductor timing characteristics and data retention are temperature-dependent. By rapidly heating or cooling the device, an attacker can push it outside its specified operating range.

• Mechanism: Using a heat gun, Peltier element, or freeze spray to alter the chip's temperature. Cooling can slow transistor switching, causing timing faults. Heating can increase leakage currents and lead to logic errors.
• Target: Often used to bypass temperature sensors or defeat thermal protection mechanisms. Can also be combined with voltage glitching, as a chip's voltage tolerance decreases at extreme temperatures.
• Example: Cooling a device can cause SRAM to retain data longer after power-down, facilitating cold boot attacks to extract keys from memory.

Reset glitching involves briefly asserting the microcontroller's hardware reset line during a critical operation. This can cause the device to reinitialize without completing a security-sensitive routine, potentially leaving it in an insecure state.

• Mechanism: The attacker toggles the RESET pin low for a very short duration—long enough to disrupt the CPU pipeline but not long enough for a full, clean reset sequence.
• Target: Secure boot processes, where a glitch during integrity verification might cause the bootloader to skip verification and load untrusted code. Also used to interrupt communication protocols to cause state machine errors.
• Defense: Modern secure microcontrollers implement glitch detectors on reset and power pins that trigger a full, secure reset if a glitch is detected.

A Side-Channel Attack is a passive, non-invasive exploit that extracts secret information (e.g., cryptographic keys) by analyzing indirect physical emissions from a device during operation. Unlike fault injection, it does not intentionally disrupt function.

• Common Vectors: Power consumption (Differential Power Analysis), electromagnetic radiation, acoustic noise, or timing variations.
• Defense: Constant-time algorithms, power/EM shielding, and masking techniques that decorrelate secret data from physical observables.

A Hardware Security Module (HSM) is a dedicated, tamper-resistant physical device that safeguards cryptographic keys and performs secure operations. For TinyML, integrated or discrete HSMs provide a root of trust resistant to fault injection.

• Function: Secure key generation, storage, and cryptographic operations (encryption, signing).
• Tamper Response: Often includes sensors that zeroize keys upon detection of physical intrusion or environmental anomalies (e.g., voltage/clock glitches).

A Trusted Execution Environment (TEE) is a secure, isolated area within a main processor that provides protected execution for sensitive code and data. It creates a logical barrier against fault attacks targeting the normal operating system.

• Implementation: ARM TrustZone is a common hardware-based TEE for Cortex-M microcontrollers.
• Use Case: Isolating a TinyML model's weights, inference logic, or a cryptographic library from less-trusted application code.

A Physical Unclonable Function (PUF) is a hardware security primitive that uses inherent, microscopic manufacturing variations in silicon to generate a unique, device-specific fingerprint. This can be used for key generation and device authentication resilient to certain faults.

• Mechanism: The PUF response is derived from analog characteristics, not stored digitally, making it harder to extract via glitching.
• Application: Deriving a unique device key for encrypting a TinyML model stored in external flash, binding the model to the specific MCU instance.

Control Flow Integrity (CFI) is a software security mechanism that enforces a program's runtime execution to follow a pre-determined, legitimate control-flow graph. It mitigates fault attacks aimed at hijacking program execution.

• Protection: Detects and prevents illegal jumps or returns induced by a fault (e.g., skipping a password check).
• TinyML Challenge: Implementing CFI on highly constrained MCUs requires lightweight instrumentation and may rely on hardware features like a Memory Protection Unit (MPU).

Lightweight Cryptography refers to cryptographic algorithms (ciphers, hash functions) designed for minimal hardware footprint, low power, and high speed on constrained devices. These are essential for implementing cryptographic countermeasures against fault injection.

• Standards: NIST-standardized algorithms like Ascon (for authenticated encryption) and SPHINCS+ (for post-quantum signatures).
• Role: Enables efficient authenticated encryption of model updates or sensor data, and secure firmware attestation, even on devices with severe RAM/ROM constraints.