Neural Architecture Search (NAS) is an automated machine learning process that discovers high-performing neural network architectures for a given task, dataset, and set of constraints like latency, memory, or energy. Instead of relying on human intuition, NAS employs search algorithms—such as reinforcement learning, evolutionary algorithms, or gradient-based methods—to explore a vast design space of possible layer types, connections, and hyperparameters, identifying architectures that maximize accuracy within the defined resource budget.
Glossary
Neural Architecture Search

What is Neural Architecture Search?
Neural Architecture Search (NAS) automates the discovery of optimal neural network designs for specific tasks and hardware constraints.
For embedded and TinyML deployment, Hardware-Aware NAS (HW-NAS) is critical. It directly optimizes for metrics like SRAM usage, FLOPs, and latency on target microcontrollers or NPUs. Techniques like ProxylessNAS and the Once-For-All (OFA) network enable the co-design of efficient models, such as MCUNet, that achieve high accuracy under severe memory constraints (e.g., <256KB), making ImageNet-scale inference possible on low-power devices.
Core Characteristics of Neural Architecture Search
Neural Architecture Search (NAS) automates the discovery of optimal neural network designs by treating architecture selection as an optimization problem, balancing task performance with hardware-specific constraints like latency and memory.
Search Space Definition
The search space defines the universe of possible neural network architectures the NAS algorithm can explore. For embedded systems, this space is heavily constrained to ensure the final model is deployable on target hardware.
- Cell-based spaces define repeating, parameterized building blocks (cells) that are stacked to form the full network.
- Macro spaces allow the search over the entire network's macro-architecture, including the number of layers, layer types (e.g., depthwise convolution, inverted residual block), and connection patterns.
- Hardware-aware constraints are baked in, limiting operations to those supported by the microcontroller (e.g., excluding unsupported activations) and setting bounds on total parameters or FLOPs.
Search Strategy
The search strategy is the optimization algorithm that navigates the search space to find high-performing architectures. Different strategies offer trade-offs between search efficiency and computational cost.
- Reinforcement Learning (RL): Uses a controller (e.g., an RNN) to generate architectures, which are then trained and evaluated; the resulting accuracy serves as a reward to update the controller (e.g., NASNet, MnasNet).
- Evolutionary Algorithms: Treat architectures as individuals in a population, using mutation and crossover operations to evolve better designs over generations (e.g., AmoebaNet).
- Differentiable NAS (DARTS): Formulates the search as a continuous optimization problem where architecture choices are relaxed into soft, learnable parameters, enabling efficient gradient-based search.
- One-Shot / Weight-Sharing: Trains a single, over-parameterized supernet that encompasses all sub-architectures; the search involves evaluating sub-networks by sampling paths from this shared weight pool, drastically reducing search cost (e.g., ProxylessNAS, Once-For-All).
Performance Estimation Strategy
Evaluating every candidate architecture by fully training it is prohibitively expensive. Performance estimation strategies provide low-cost proxies for final model accuracy.
- Lower Fidelity Estimates: Train candidates for fewer epochs, on a subset of data, or with reduced resolution.
- Weight Sharing: As used in one-shot NAS, sub-networks inherit weights from the supernet, and their performance is estimated via a single forward pass or very few epochs of fine-tuning.
- Learning Curve Extrapolation: Predicts final accuracy from the initial phases of training.
- Surrogate Models: Train a separate predictor model (e.g., a regressor) to map an architecture's encoding to its expected performance.
- For hardware metrics like latency, a look-up table or a latency predictor model is often pre-built by profiling each operation type on the target device (e.g., microcontroller or NPU).
Hardware-Aware Optimization
A defining feature of NAS for embedded systems is the direct optimization for hardware-specific constraints, moving beyond just accuracy. The search objective becomes a multi-criteria optimization problem.
- Primary Constraints: Latency (inference time), memory footprint (SRAM/Flash usage), and energy consumption.
- Objective Functions: Often combine accuracy with a penalty for violating constraints (e.g.,
Accuracy * (Latency/Target)^-w). - On-Device Measurement: The most reliable method integrates direct hardware profiling into the search loop, using tools like MCU-based profilers or simulator estimates for cycle-accurate performance.
- Platform-Specific Operations: The search space is limited to kernels well-supported by the target hardware, such as depthwise separable convolutions for efficient ARM CPUs or binary operations for ultra-low-power microcontrollers.
Differentiable Architecture Search (DARTS)
Differentiable Architecture Search (DARTS) is a prominent gradient-based NAS method that significantly accelerates the search process. It transforms the discrete search space into a continuous one for efficient optimization.
- Continuous Relaxation: Each choice (e.g., which operation connects two nodes in a cell) is represented by a set of continuous architecture parameters (alpha). All candidate operations are executed and mixed via a softmax-weighted sum.
- Bi-Level Optimization: The process alternates between:
- Updating network weights (w) by standard gradient descent on the training set.
- Updating architecture parameters (alpha) by gradient descent on a validation set.
- Discretization: After search, a final architecture is derived by replacing the mixed operations with the strongest one (e.g., the operation with the highest alpha value).
- Advantage: DARTS can complete a search in a few GPU days, compared to thousands for earlier RL methods.
One-Shot and Weight-Sharing NAS
One-Shot NAS methods dramatically reduce computational cost by training a single, weight-shared supernetwork (or one-shot model) that encompasses all architectures in the search space.
- Supernet Training: The supernet is trained once, with each training step sampling a different sub-architecture (path) and updating only the weights along that path.
- Search as Evaluation: After training, the search involves evaluating the performance of many sub-networks by inheriting weights from the supernet, requiring only inference or minimal fine-tuning.
- Efficiency: This decouples the expensive weight training from the architecture search, enabling NAS on limited compute budgets.
- Challenges: Weight coupling and co-adaptation can make the performance ranking of sub-networks less reliable. Methods like ProxylessNAS address this by directly training binarized paths on the target hardware and task.
- Once-For-All (OFA): Extends this concept by training a supernet to support a large range of sub-networks (different depths, widths, kernel sizes), enabling instant specialization to diverse hardware constraints without retraining.
How Neural Architecture Search Works
Neural Architecture Search (NAS) automates the design of neural network topologies, using algorithms to discover optimal structures for a given task and hardware constraints.
Neural Architecture Search (NAS) is an automated process for discovering optimal neural network architectures for a given task and set of constraints, such as latency or memory footprint. It treats architecture design as a search problem within a predefined search space, using a search strategy (like reinforcement learning or evolutionary algorithms) guided by a performance estimation strategy to evaluate candidate models. The goal is to replace manual, expert-driven design with systematic, data-driven optimization.
For embedded systems, Hardware-Aware NAS (HW-NAS) is critical, where the search directly optimizes for metrics like SRAM usage, FLOPs, or energy consumption on a target microcontroller or NPU. Methods like ProxylessNAS or Once-For-All (OFA) Networks enable finding or adapting compact architectures like MCUNet without prohibitive computational cost, co-designing the model and the underlying inference engine for extreme resource constraints.
Comparison of Major NAS Methodologies
A technical comparison of core Neural Architecture Search (NAS) paradigms, highlighting their mechanisms, resource demands, and suitability for TinyML deployment.
| Search Paradigm | Reinforcement Learning (RL) | Evolutionary Algorithms (EA) | Differentiable / Gradient-Based (DARTS) |
|---|---|---|---|
Core Search Mechanism | Controller RNN generates architectures, rewarded by validation accuracy. | Population of architectures evolved via mutation/crossover, selected by fitness. | Continuous relaxation of architecture choices; parameters learned via gradient descent. |
Primary Optimization Metric | Validation Accuracy (often with resource penalty). | Validation Accuracy & Model Complexity (Pareto front). | Validation Loss (with architectural weights). |
Computational Cost (GPU Days) | ~2,000 - 4,000 (e.g., NASNet, PNAS). | ~100 - 3,000 (highly variable with population size). | < 1 - 10 (e.g., DARTS, ProxylessNAS). |
Hardware-Aware Search Capability | Possible via reward shaping (e.g., latency penalty). | Native (fitness function can include latency/energy). | Native via gradient estimation (e.g., ProxylessNAS). |
Output Architecture Type | Discrete, final model must be trained from scratch. | Discrete, final model must be trained from scratch. | Continuous encoding must be discretized (performance gap possible). |
Suited for TinyML Co-Design | |||
Typical Search Space | Macro (cell-based) or full network. | Macro (cell-based) or full network. | Typically cell-based; limited full-network searches. |
Key Advantage for Embedded | Can discover novel, high-performance structures. | Strong at multi-objective optimization (accuracy vs. size/latency). | Extremely fast search, enabling direct on-target hardware lookup. |
Frameworks and Platforms for NAS
A survey of key software libraries and platforms that automate the discovery of neural network architectures, with a focus on those enabling hardware-aware search for embedded and edge devices.
AutoML Frameworks
General-purpose AutoML libraries that include NAS as a core capability, providing high-level APIs to automate model design. These frameworks abstract the search algorithm, allowing developers to specify constraints like model size or latency.
- Google's AutoKeras: An open-source library built on Keras/TensorFlow, using Bayesian optimization and network morphism for accessible NAS.
- Microsoft's NNI (Neural Network Intelligence): A comprehensive toolkit supporting multiple NAS strategies (e.g., ENAS, DARTS) and hyperparameter tuning across frameworks.
- AutoGluon: An AutoML library from Amazon that provides easy-to-use tabular, text, and image predictors, automating architecture and hyperparameter choices.
These tools lower the barrier to entry but may require customization for strict microcontroller constraints.
Hardware-Aware NAS (HW-NAS) Platforms
Specialized platforms that directly integrate hardware feedback into the search loop. They profile candidate architectures on the target device (or an accurate simulator) to optimize for metrics like latency, energy, and memory footprint—critical for TinyML.
- ProxylessNAS: Pioneered direct search on the target hardware (e.g., mobile phone) using gradient-based methods and a latency lookup table, eliminating proxy inaccuracies.
- Once-For-All (OFA): Trains a single supernet that subsumes many sub-architectures. Search involves selecting a sub-network tailored to specific device constraints without retraining, enabling efficient deployment across heterogeneous edge hardware.
- MCUNet's TinyNAS: Co-designs the neural architecture with the inference engine (TinyEngine). It searches for networks that fit within the SRAM and flash memory limits of microcontrollers (e.g., < 256KB) while maximizing accuracy.
Differentiable NAS (DARTS) & Variants
Frameworks based on the Differentiable Architecture Search (DARTS) paradigm, which treats the search space as a continuous, over-parameterized network. Architecture parameters are learned via gradient descent alongside weights, making search orders of magnitude faster than reinforcement learning or evolutionary methods.
- DARTS: The foundational implementation, formulating the choice between operations (e.g., 3x3 conv, skip connect) as a continuous relaxation.
- GDAS (Gradient-based Search using Differentiable Architecture Sampler): Improves stability and reduces memory cost by sampling a single path in the supernet during search.
- SNAS (Stochastic NAS): Introduces a concrete distribution and policy gradient to maintain the differentiability advantage while yielding a discrete architecture in a single search run.
These are powerful for research but can be memory-intensive during search.
Evolutionary & Reinforcement Learning NAS
Platforms employing population-based evolutionary algorithms or controller-based reinforcement learning (RL) to explore the architecture space. These methods are highly flexible and can discover novel, non-differentiable structures.
- Google's AmoebaNet: Used regularized evolution (a genetic algorithm) to discover architectures that outperformed human-designed models on ImageNet.
- ENAS (Efficient NAS): Uses a controller RNN trained with policy gradient to generate model architectures, with weight sharing across child models to drastically reduce search cost.
- LEAF (Lifelong Evolutionary AF): An evolutionary framework focused on continual adaptation of architectures for changing tasks or data streams on edge devices.
These approaches often require substantial computational resources for the initial search phase.
TinyML-Optimized NAS Tools
Emerging frameworks specifically designed for the extreme constraints of microcontrollers. They incorporate microarchitecture-level details like SRAM/Flash budgets, fixed-point quantization effects, and available DSP instructions.
- MCUNet (TinyNAS + TinyEngine): The leading co-design framework for microcontrollers. TinyNAS performs hardware-aware search under the memory bottleneck, while TinyEngine is a memory-optimized inference library that executes the found model.
- µNAS (Micro-NAS): A hardware-aware NAS framework that uses a predictor-based approach, training a cheap latency/accuracy predictor for target MCU platforms to accelerate the search.
- SPOS (Single Path One-Shot NAS): A supernet-based method where the search is simplified to training a one-shot model and then evaluating sub-networks via uniform path sampling, adaptable to TinyML constraints.
These tools are essential for pushing the boundaries of on-device AI capability.
Frequently Asked Questions
Neural Architecture Search (NAS) automates the design of neural networks, a critical process for creating models that must run efficiently on severely constrained hardware like microcontrollers.
Neural Architecture Search (NAS) is an automated machine learning (AutoML) process that discovers optimal neural network architectures for a specific task and set of constraints, such as latency, memory footprint, or energy consumption, rather than relying on manual, human-designed topologies.
It treats the network design—choices like the number of layers, types of operations (e.g., convolution, attention), and their connectivity—as a search problem. The process typically involves three core components: a search space defining all possible architectures, a search strategy (like reinforcement learning, evolutionary algorithms, or gradient-based methods) to explore it, and a performance estimation strategy (like training on a subset of data) to evaluate candidate designs. For TinyML, NAS is indispensable for co-designing networks that fit within the extreme memory (often <500KB) and compute limits of microcontrollers.
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Related Terms
Neural Architecture Search (NAS) intersects with several key concepts in efficient model design. These related terms represent the building blocks, search methodologies, and optimized architectures that define the field of automated neural network design for constrained hardware.
Hardware-Aware NAS
Hardware-Aware Neural Architecture Search (HW-NAS) is a variant of NAS where the search algorithm directly optimizes the neural architecture for specific hardware performance metrics like latency, energy consumption, or memory usage on target devices such as microcontrollers or NPUs. Unlike standard NAS which focuses solely on accuracy, HW-NAS incorporates a hardware feedback loop.
- The search process is guided by a cost model or direct on-device measurements (e.g., latency lookup tables, energy profilers).
- It enables the discovery of models that are Pareto-optimal for the trade-off between accuracy and hardware efficiency.
- This is critical for TinyML, where a model's viability is determined by its ability to fit within a device's SRAM and flash memory constraints and meet real-time latency requirements.
Differentiable NAS (DARTS)
Differentiable Architecture Search (DARTS) is a gradient-based NAS method that formulates the search space as a continuous, over-parameterized network where architecture parameters are learned via standard gradient descent alongside model weights. It replaces the discrete search over operations with a continuous relaxation.
- All candidate operations (e.g., 3x3 conv, 5x5 conv, skip connect) are represented in a mixed operation, weighted by architecture parameters (alpha).
- The search involves jointly optimizing the network weights (with standard gradient descent) and the architecture parameters (with gradient descent on the validation loss).
- After search, a discrete architecture is derived by retaining the operation with the highest weight for each node. This method is significantly faster than reinforcement learning or evolutionary-based searches but can be memory-intensive during the search phase.
Once-For-All Network
A Once-For-All (OFA) network is a single, large neural network trained to support many sub-networks of different depths, widths, and kernel sizes through weight sharing. It decouples training from search to enable efficient hardware-aware NAS.
- The supernet is trained with progressive shrinking, where larger sub-networks are trained first, and then smaller ones are fine-tuned from the larger network's weights.
- After training, a specialized sub-network can be extracted for any target constraint (e.g., 50ms latency, 200KB memory) without retraining.
- This allows for rapid architecture specialization across a diverse fleet of edge devices with varying capabilities, as the search involves only evaluating candidate sub-networks from the pre-trained supernet.
ProxylessNAS
ProxylessNAS is a neural architecture search method that directly learns architectures on the target task and hardware without using a proxy (like training on a smaller dataset or for fewer epochs). It brings the search cost closer to that of training a single network.
- It employs path-level binarization, where at any time only one path in the over-parameterized network is activated, reducing memory overhead during search.
- Gradients for the architecture parameters are estimated using binary connect, enabling gradient-based optimization.
- It can directly incorporate hardware latency, measured via a lookup table or on-device, into the loss function, making it a practical method for HW-NAS. This avoids the inaccuracy of proxy metrics when searching for microcontroller-optimal models.
MCUNet
MCUNet is a co-design framework that jointly optimizes Tiny Neural Network architecture (TinyNAS) and the underlying inference engine (TinyEngine) to enable ImageNet-scale classification directly on microcontrollers with severe memory constraints (e.g., 256KB SRAM).
- TinyNAS is a hardware-aware NAS that searches for models under the peak memory usage constraint of the target device.
- TinyEngine is a memory-aware inference library that performs in-place depthwise convolution and other optimizations to minimize memory footprint during execution.
- The co-design ensures the searched architecture is not only efficient in theory but can be executed efficiently by the inference engine on real hardware. This approach has demonstrated state-of-the-art accuracy on microcontrollers like the Arm Cortex-M7.
Evolutionary NAS
Evolutionary Neural Architecture Search uses evolutionary algorithms, inspired by biological evolution, to discover optimal network architectures. It maintains a population of candidate models which are iteratively improved through selection, mutation, and crossover operations.
- Each model (genotype) is evaluated for fitness (e.g., accuracy on a validation set, latency).
- The best-performing models are selected to produce offspring for the next generation through mutation (e.g., changing an operation type, adding/removing a layer) and crossover (combining parts of two parent architectures).
- While often computationally expensive, evolutionary methods are highly flexible and can navigate complex, non-differentiable search spaces. They are effective for multi-objective optimization, such as jointly optimizing for accuracy, latency, and model size.

About the author
Prasad Kumkar
CEO & MD, Inference Systems
Prasad Kumkar is the CEO & MD of Inference Systems and writes about AI systems architecture, LLM infrastructure, model serving, evaluation, and production deployment. Over 5+ years, he has worked across computer vision models, L5 autonomous vehicle systems, and LLM research, with a focus on taking complex AI ideas into real-world engineering systems.
His work and writing cover AI systems, large language models, AI agents, multimodal systems, autonomous systems, inference optimization, RAG, evaluation, and production AI engineering.
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