Inferensys

Glossary

SR-IOV

Single Root I/O Virtualization, a PCI-SIG standard that partitions a single physical network interface card into multiple virtual functions, bypassing the hypervisor's software switch to deliver near-native network performance to pods.
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Single Root I/O Virtualization

What is SR-IOV?

A PCI-SIG standard that enables a single physical network interface card (NIC) to be partitioned into multiple virtual functions, providing direct hardware access to virtualized workloads for near-native performance.

Single Root I/O Virtualization (SR-IOV) is a hardware specification that allows a PCI Express (PCIe) device, such as a network adapter, to present itself as multiple separate virtual devices. It creates one or more Virtual Functions (VFs) from a single Physical Function (PF) , each with its own dedicated PCIe configuration space, memory-mapped I/O, and direct memory access (DMA) channels. This bypasses the hypervisor's software-based I/O virtualization layer, eliminating the performance overhead of virtual switches and enabling near-native throughput and latency for network-intensive workloads.

In a Kubernetes environment, the SR-IOV Network Device Plugin discovers and advertises VFs as allocatable resources, allowing pods to consume them directly via multus-cni. This is critical for disconnected Kubernetes for AI clusters where high-performance, low-latency networking is required for distributed model training or inference serving. By assigning a dedicated VF to a pod, the network traffic flows directly from the pod's memory space to the NIC hardware, ensuring deterministic performance and strict isolation without the CPU overhead of kernel-based bridging.

HARDWARE-ASSISTED I/O VIRTUALIZATION

Key Characteristics of SR-IOV

Single Root I/O Virtualization (SR-IOV) is a PCI Express specification that allows a single physical network interface card (NIC) to be partitioned into multiple virtual functions, bypassing the hypervisor's software switch to deliver near-native network performance directly to pods.

01

Physical Function (PF)

A Physical Function is a full-featured PCIe function embedded in the SR-IOV-capable NIC. The PF acts as the management and configuration anchor for all associated Virtual Functions. It possesses full configuration capabilities, including the ability to create, provision, and manage VFs. The PF is discovered and managed by the host operating system or hypervisor, and it is the entity that handles link state changes and firmware updates. Only one PF typically exists per physical port, and it is not directly assigned to guest virtual machines or pods.

02

Virtual Function (VF)

A Virtual Function is a lightweight, pared-down PCIe function that represents a slice of the physical NIC's resources. Each VF contains only the essential resources for data movement: dedicated transmit and receive queues, DMA channels, and a unique PCI Requester ID. VFs lack full configuration capabilities and cannot be used to modify the underlying physical device. They are designed for direct assignment to a single pod or virtual machine via the VFIO (Virtual Function I/O) kernel framework, providing a dedicated, hardware-isolated data path with minimal CPU overhead.

03

PCIe Passthrough & Bypass

SR-IOV achieves its performance advantage by completely bypassing the hypervisor's virtual switch and the kernel's networking stack for data plane traffic. A VF is mapped directly into a pod's memory space using the VFIO-PCI driver, granting the workload direct hardware access. This eliminates the context switching and packet copying inherent in software-based bridging. The result is near line-rate throughput, microsecond-level latency, and zero CPU steal for packet processing, making it essential for latency-sensitive AI inference serving and high-frequency trading platforms.

04

Resource Isolation & QoS

Each VF operates with hardware-enforced isolation from other VFs on the same physical port. The NIC's on-chip switch enforces traffic separation, preventing one noisy neighbor from starving another of bandwidth. Advanced NICs support Quality of Service (QoS) policies configurable via the PF, allowing administrators to set minimum and maximum bandwidth guarantees per VF. This deterministic resource allocation is critical for multi-tenant Kubernetes clusters where AI training jobs must coexist with latency-bound inference serving without mutual interference.

05

SR-IOV Network Operator

In Kubernetes, the SR-IOV Network Operator automates the lifecycle management of SR-IOV devices. It discovers compatible NICs, configures PFs, and provisions VFs based on declarative SriovNetworkNodePolicy custom resources. The operator integrates with Multus CNI to attach VF-backed interfaces to pods as secondary networks. Key capabilities include:

  • Device Plugin: Advertises available VFs to the kubelet as extended resources (e.g., intel.com/sriov_netdevice)
  • Configuration Daemon: Applies node-specific VF counts and driver settings
  • Policy-Driven: Allows per-node or pool-based VF topology configuration
06

NUMA Alignment & Topology

For optimal performance, SR-IOV VFs must be allocated from a NIC that resides on the same NUMA node as the pod's assigned CPUs and GPU. Cross-NUMA traffic incurs significant latency penalties due to inter-socket communication. The Topology Manager kubelet component, combined with the SR-IOV device plugin, can enforce single-NUMA-node alignment policies. This ensures that a pod requesting a VF, CPU cores, and hugepages receives all resources from the same physical socket, eliminating non-uniform memory access bottlenecks for distributed AI training workloads.

NETWORK PERFORMANCE COMPARISON

SR-IOV vs. Other Kubernetes Networking Models

A technical comparison of SR-IOV against standard overlay and bridge-based networking plugins for high-throughput AI inference and training workloads in Kubernetes.

FeatureSR-IOVCalico (eBPF)Flannel (VXLAN)

Data Path

Direct PCIe passthrough to VF

eBPF programs in kernel

Kernel VXLAN tunnel

Throughput vs. Bare Metal

~99%

~90-95%

~70-80%

Added Latency

< 5 µs

10-30 µs

50-100 µs

CPU Overhead for Packet Processing

None (hardware offload)

Low (eBPF JIT)

High (kernel encap/decap)

Network Policy Support

Pod Live Migration Support

Multi-Tenancy Isolation

Hardware-level (PCIe)

Software (eBPF/iptables)

Software (iptables)

Requires Specialized NIC

SR-IOV CLARIFIED

Frequently Asked Questions

Concise answers to the most common technical questions about Single Root I/O Virtualization, its operational mechanics, and its critical role in high-performance, air-gapped Kubernetes networking for AI workloads.

Single Root I/O Virtualization (SR-IOV) is a PCI Express (PCIe) specification that allows a single physical network interface card (NIC), known as the Physical Function (PF), to be partitioned into multiple lightweight, virtualized instances called Virtual Functions (VFs). Each VF is assigned a unique PCIe requester ID and appears to the operating system as a distinct, fully functional NIC with its own dedicated hardware resources, including transmit/receive queues and interrupts. The hypervisor or host OS directly assigns a VF to a virtual machine or container, bypassing the software-based virtual switch entirely. This direct hardware access enables near-native network performance by eliminating the CPU overhead and latency associated with paravirtualized I/O paths, making it essential for latency-sensitive AI inference serving in disconnected Kubernetes environments.

Prasad Kumkar

About the author

Prasad Kumkar

CEO & MD, Inference Systems

Prasad Kumkar is the CEO & MD of Inference Systems and writes about AI systems architecture, LLM infrastructure, model serving, evaluation, and production deployment. Over 5+ years, he has worked across computer vision models, L5 autonomous vehicle systems, and LLM research, with a focus on taking complex AI ideas into real-world engineering systems.

His work and writing cover AI systems, large language models, AI agents, multimodal systems, autonomous systems, inference optimization, RAG, evaluation, and production AI engineering.