Glossary

Live Migration

The capability to move a running virtualized control workload from one physical host to another without interrupting the execution state, enabling zero-downtime maintenance in high-availability architectures.

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ZERO-DOWNTIME WORKLOAD RELOCATION

What is Live Migration?

Live migration is a hypervisor-driven process that moves a running virtualized control workload from one physical host to another without interrupting its execution state, enabling zero-downtime maintenance in high-availability architectures.

Live migration is the capability to transfer the entire operational state of a virtual machine—including CPU registers, memory contents, and active network connections—between two distinct physical servers while the guest operating system and its hosted real-time control logic continue executing. The process leverages iterative memory pre-copying to minimize the final pause time, often reducing it to sub-second durations imperceptible to connected IEC 61131-3 runtime environments.

In industrial control system virtualization, live migration is critical for achieving fault tolerance and enabling proactive hardware maintenance without scheduling production downtime. The technique relies on shared storage and a converged Time-Sensitive Networking (TSN) fabric to maintain deterministic network paths post-migration, ensuring that Soft PLC instances and their associated I/O bindings remain intact and synchronized with the physical process.

Zero-Downtime State Transfer

Key Characteristics of Live Migration

Live migration is the process of moving a running virtualized control workload between physical hosts without interrupting its execution state. This capability is foundational for non-disruptive maintenance, load balancing, and high-availability architectures in software-defined manufacturing.

Pre-Copy Memory Transfer

The hypervisor iteratively copies the virtual machine's memory pages from the source host to the destination while the workload continues to execute. Dirty pages modified during transfer are re-sent in successive rounds until the remaining delta is small enough for a brief final pause. This minimizes the blackout window to milliseconds, ensuring deterministic control loops are not violated.

< 100ms

Typical Blackout Window

Post-Copy Migration

The virtual machine's execution is suspended on the source and its minimal processor state is transferred to the destination to resume immediately. Memory pages are then demand-paged from the source over the network as the destination accesses them. This guarantees a single, bounded suspension but introduces a dependency on the source host until all pages are retrieved, making it suitable when pre-copy convergence is slow.

Shared Storage Requirement

Live migration requires that both source and destination hosts have simultaneous access to the virtual machine's disk images. This is typically achieved through a Storage Area Network (SAN) or distributed file system. The virtual machine's persistent state never moves; only its active memory and CPU context are transferred, drastically reducing the data volume and migration time.

Network State Preservation

The migration must maintain open TCP connections and in-flight network packets. The hypervisor updates network infrastructure, often via a gratuitous ARP or reverse ARP broadcast, to redirect traffic to the destination host's physical switch port. For SR-IOV virtual functions, the MAC address and VLAN tags are reprogrammed on the destination's NIC to ensure seamless Layer 2 continuity.

CPU Compatibility Constraints

The destination host's CPU must support a superset of the instruction set features exposed to the virtual machine. Hypervisors mask or expose specific CPU feature flags to create a common baseline across a cluster. Migration between CPUs from different vendors or generations without this vCPU abstraction will fail, making homogeneous or carefully managed heterogeneous clusters essential.

Real-Time Determinism Guarantees

For industrial control workloads, the hypervisor must guarantee that the migration's final stop-and-copy phase does not exceed the control loop's maximum tolerated jitter. Real-time hypervisors with CPU pinning and cache partitioning isolate the migration agent threads from the control workload, ensuring that the brief suspension remains within the application's deadline, preserving Safety Integrity Level (SIL) compliance.

LIVE MIGRATION

Frequently Asked Questions

Clear, technically precise answers to the most common questions about moving virtualized control workloads between physical hosts without interrupting execution state.

Live migration is the process of moving a running virtualized control workload—such as a Soft PLC or an IEC 61499 function block runtime—from one physical host to another without interrupting its execution state, network connections, or I/O operations. Unlike simple failover, which involves restarting a workload on secondary hardware, live migration preserves the entire in-memory state, including the values of timers, counters, and sequential function chart steps. The hypervisor iteratively copies the virtual machine's memory pages to the destination host while the source continues executing. In the final phase, the source VM is briefly paused, the remaining dirty pages and CPU registers are transferred, and execution resumes on the destination. For industrial applications requiring Safety Integrity Level (SIL) compliance, this pause must be shorter than the process safety time, typically under 100 milliseconds, to avoid triggering a safety fault. The technique enables zero-downtime maintenance, load balancing across edge servers, and proactive evacuation of workloads from hardware exhibiting predictive failure signatures.

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FOUNDATIONAL CONCEPTS

Related Terms

Live migration of virtualized control workloads depends on a precise orchestration of underlying infrastructure. The following concepts form the technical foundation that makes zero-downtime relocation of running PLCs and industrial applications possible.

Precision Time Protocol (PTP)

The IEEE 1588 standard that synchronizes distributed clocks to sub-microsecond accuracy. During live migration, PTP ensures the source and destination hosts share an identical time base, preventing discontinuities in control loop execution and timestamped sensor data. Without PTP, even a millisecond drift can cause sequence-of-events errors in safety-logged systems.

< 1 µs

Synchronization Accuracy

CPU Pinning

The technique of binding a virtual machine's vCPU threads exclusively to dedicated physical processor cores. For live migration, CPU pinning guarantees that the target host reserves identical core topology and cache architecture, eliminating scheduling jitter. This is non-negotiable for real-time control workloads where a cache miss can violate deterministic cycle time constraints.

Single Root I/O Virtualization (SR-IOV)

A PCI Express specification that allows a single physical network adapter to present itself as multiple independent virtual functions. During migration, SR-IOV enables direct hardware passthrough for fieldbus interfaces like EtherCAT or PROFINET, bypassing hypervisor network stacks entirely. This preserves the microsecond-level latency required for isochronous communication with remote I/O.

Fault Tolerance (FT)

An operational design where a secondary redundant system executes in lockstep with the primary controller. Unlike live migration, which is a planned relocation for maintenance, FT provides instantaneous, bumpless takeover upon hardware failure. The two concepts are complementary: live migration handles planned events; FT handles unplanned failures in high-availability architectures.

Time-Sensitive Networking (TSN)

A set of IEEE 802.1 Ethernet standards guaranteeing deterministic, low-latency data delivery over converged networks. During live migration, TSN ensures that the network path between the new host location and field devices maintains bounded latency and zero congestion loss. TSN's frame preemption and traffic scheduling prevent best-effort traffic from interfering with critical control streams.

Mixed-Criticality System

A consolidated computing architecture where safety-critical control functions and non-critical edge applications execute on a single hardware platform with strict temporal and spatial isolation. Live migration in mixed-criticality environments requires the hypervisor to guarantee that the migration process itself does not violate the isolation guarantees of other safety-rated partitions running on the same silicon.

About the author

Prasad Kumkar

CEO & MD, Inference Systems

Prasad Kumkar is the CEO & MD of Inference Systems and writes about AI systems architecture, LLM infrastructure, model serving, evaluation, and production deployment. Over 5+ years, he has worked across computer vision models, L5 autonomous vehicle systems, and LLM research, with a focus on taking complex AI ideas into real-world engineering systems.

His work and writing cover AI systems, large language models, AI agents, multimodal systems, autonomous systems, inference optimization, RAG, evaluation, and production AI engineering.

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