Static Transfer Switch

The defining characteristic of a static transfer switch is its ability to detect a source failure and complete a transfer in less than a quarter of an electrical cycle (typically < 4 milliseconds for 60 Hz systems). This speed is achieved through silicon-controlled rectifiers (SCRs) rather than mechanical contacts. The transfer time is so brief that it falls well within the Information Technology Industry Council (ITIC) curve tolerance envelope, meaning downstream power supplies do not see a zero-voltage condition and continue operating without interruption.

Static transfer switches execute a break-before-make transfer to prevent a momentary parallel connection between two unsynchronized sources, which would cause catastrophic fault currents. Advanced units employing closed-transition or overlap transfer momentarily parallel the two sources only when they are within strict phase synchronization tolerances. This overlap, lasting microseconds, ensures absolutely zero power interruption but requires precise phase-locked loop (PLL) control to avoid cross-currents.

The transfer is initiated by sophisticated sensing algorithms that monitor voltage on all three phases. Detection methods include:

• RMS Voltage Deviation: Transfer triggers if voltage falls below 90% or rises above 110% of nominal.
• Phase Imbalance: A vector shift or angle error between phases indicates a collapsing source.
• dv/dt Sensing: The rate of change of voltage triggers a preemptive transfer before the RMS value collapses. This multi-criteria logic prevents nuisance transfers caused by transient dips while ensuring a trip on genuine feeder failure.

Unlike a circuit breaker, a static transfer switch does not provide overcurrent protection. The SCRs are rated for continuous current but possess a defined I²t (current-squared-time) withstand rating. During a downstream short circuit, the STS must remain in conduction until a downstream protective device clears the fault. The control logic distinguishes between an upstream source failure (requiring transfer) and a downstream load fault (requiring ride-through) to prevent transferring a fault onto a healthy source.

A static transfer switch requires control power to maintain gate drive signals to the SCRs. To prevent a single point of failure, the control power supply is typically dual-redundant, drawing from both the primary and alternate input sources through independent AC-DC converters. In a dual-loss scenario, stored energy in capacitors maintains gate firing long enough to ensure a fail-safe conduction path. This 'fail-to-on' philosophy ensures cooling and critical loads are not dropped even if the control logic fails.

To allow service without dropping the load, static transfer switches are integrated with an external wraparound maintenance bypass switchboard. This electromechanical bypass provides a direct hard-wired path from source to load, physically isolating the solid-state electronics. The bypass sequence is a make-before-break operation, temporarily paralleling the mechanical bypass with the static switch to ensure no interruption during the transition back to raw utility power for maintenance.

A power electronic device that establishes a stable voltage and frequency reference independently, enabling a microgrid to operate without a synchronous generator. Unlike a grid-following inverter, it does not require an external reference to energize a network.

• Creates the voltage waveform for an islanded microgrid
• Essential for black start capability
• Provides the reference that an STS synchronizes against during reconnection

The automated process of synchronizing an islanded microgrid's voltage, frequency, and phase angle with the main grid to reclose the interconnection breaker without a power bump. An STS executes this transfer in less than a quarter-cycle.

• Requires precise phase-locked loop synchronization
• Prevents inrush currents that could trip protection devices
• Typical break time: < 4 milliseconds for solid-state devices

An unplanned electrical island formed when a portion of the utility grid becomes isolated from the main system but remains energized by distributed energy resources. An STS must detect this condition to prevent back-feeding.

• Anti-islanding detection is a safety-critical function
• IEEE 1547 mandates detection within 2 seconds
• The STS isolates the local load from the faulted grid during this event

The capability of a generator or inverter to remain connected and operate through periods of abnormally low or high voltage. An STS supports this by instantly transferring sensitive loads to a healthy source during a voltage sag.

• Prevents nuisance tripping of critical process equipment
• Defined by Low Voltage Ride-Through (LVRT) curves
• The STS bridges the gap before backup generation stabilizes

The deliberate, selective disconnection of electrical load to prevent a wider system collapse when generation capacity is insufficient. An STS can be integrated into a load shedding scheme to prioritize power to life-safety or mission-critical circuits.

• Operates on under-frequency or under-voltage triggers
• Fast load shedding requires sub-cycle switching action
• STS enables non-critical load to be dropped while preserving protected loads

The foundational standard defining technical requirements for the interconnection and interoperability of distributed energy resources with electric power systems. It governs the voltage and frequency ride-through settings that an STS must respect.

• Defines mandatory voltage-reactive power control modes
• Specifies clearing times for abnormal conditions
• Ensures the STS does not create an unintentional island