Inferensys

Glossary

Real-Valued Time-Delay Neural Network (RVTDNN)

A neural network architecture for digital pre-distortion that processes real-valued I and Q components separately with tapped delay lines to model the power amplifier's temporal dependencies.
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NEURAL NETWORK ARCHITECTURE

What is Real-Valued Time-Delay Neural Network (RVTDNN)?

A feed-forward neural network architecture designed for digital pre-distortion that processes the real and imaginary components of a complex baseband signal separately using tapped delay lines to model power amplifier memory effects.

A Real-Valued Time-Delay Neural Network (RVTDNN) is a neural network architecture for digital pre-distortion (DPD) that decomposes a complex baseband signal into its real (I) and imaginary (Q) components, processing each through separate tapped delay lines before feeding them into a fully connected feed-forward network. This structure explicitly models the memory effects of a power amplifier by presenting the network with a temporal window of past I and Q samples, enabling it to learn the amplifier's dynamic non-linear behavior without requiring complex-valued arithmetic.

Unlike a complex-valued neural network that operates on I/Q pairs as single entities, the RVTDNN treats the components as independent real-valued inputs, simplifying gradient computation and leveraging standard real-valued backpropagation. The tapped delay lines create a finite impulse response (FIR) filter structure at the input, capturing short-term memory effects caused by bias network dynamics and thermal time constants. This architecture serves as a universal approximator for the inverse Volterra series model and is often trained using the indirect learning architecture (ILA) to identify predistorter coefficients that compensate for both AM-AM and AM-PM distortion.

ARCHITECTURE DEEP DIVE

Key Architectural Features of RVTDNN

The Real-Valued Time-Delay Neural Network (RVTDNN) is a foundational deep learning architecture for digital pre-distortion. It processes the in-phase (I) and quadrature (Q) components of a signal as separate real-valued input streams, using tapped delay lines to model the power amplifier's memory effects without complex-valued mathematics.

01

Dual-Stream Real-Valued Inputs

Unlike complex-valued neural networks that process I and Q as a single complex entity, the RVTDNN decomposes the baseband signal into two independent real-valued streams. The I(t) and Q(t) components are fed into separate input nodes. This architectural choice simplifies gradient computation during backpropagation, as standard real-valued activation functions and optimizers can be used directly without modification. The network inherently learns the non-linear coupling between the amplitude and phase paths by combining these streams in subsequent hidden layers.

02

Tapped Delay Line Memory Modeling

The defining feature of the RVTDNN is the tapped delay line (TDL) structure applied to both I and Q inputs. For a memory depth of M, the network receives not just the current sample x(n), but a vector of delayed samples: [x(n), x(n-1), ..., x(n-M)]. This transforms the static non-linear mapping into a dynamic model capable of capturing memory effects caused by:

  • Thermal dynamics in the transistor substrate
  • Bias network impedance variations at the modulation envelope rate
  • Trapping effects in gallium nitride (GaN) devices Each delayed tap connects to all neurons in the first hidden layer, creating a fully connected temporal receptive field.
03

Feed-Forward Hidden Layer Topology

The RVTDNN employs a standard multi-layer perceptron (MLP) structure after the input TDL stage. Typical configurations use 1-2 hidden layers with hyperbolic tangent (tanh) or rectified linear unit (ReLU) activations. The feed-forward topology is sufficient because the tapped delay lines externalize the temporal processing, eliminating the need for recurrent connections. This results in:

  • Stable training without vanishing or exploding gradients common in RNNs
  • Parallelizable inference since no sequential state updates are required
  • Deterministic latency ideal for real-time DPD in 5G NR physical layer pipelines
04

Dual Output Predistorter Coefficients

The output layer produces two real values: the predistorted I'(t) and Q'(t) components. These are recombined to form the complex baseband predistorted signal that drives the power amplifier. The training objective minimizes the mean squared error between the desired linear output and the actual PA output, effectively learning the inverse amplifier characteristic. Key design considerations include:

  • Linear output activation to allow unbounded correction values
  • Joint I/Q optimization where the loss function accounts for both amplitude and phase distortion simultaneously
  • Coefficient extraction that maps directly to the modulator's digital-to-analog converter (DAC) inputs
05

Comparison to Augmented RVTDNN

The standard RVTDNN uses only the raw I and Q time-delayed samples as inputs. The Augmented RVTDNN (ARVTDNN) extends this by adding envelope-dependent terms: |x(n)|, |x(n)|², |x(n)|³, and their delayed versions. These additional inputs explicitly provide the instantaneous amplitude information, reducing the burden on the hidden layers to compute these non-linear transformations internally. The trade-off:

  • Standard RVTDNN: Fewer input parameters, requires deeper/wider hidden layers to model envelope non-linearity
  • ARVTDNN: Larger input dimensionality, but can achieve equivalent linearization with a smaller hidden layer structure
  • Selection criteria: ARVTDNN is preferred for strongly non-linear Doherty PAs; standard RVTDNN suffices for mildly non-linear class-AB amplifiers
06

Training with Indirect Learning Architecture

The RVTDNN is typically trained using the Indirect Learning Architecture (ILA). In this method, a post-distorter model is identified by swapping the PA input and output during training, then copied to the predistorter path. This avoids the need to compute a direct inverse of the PA model. The training process:

  • Step 1: Capture PA input z(n) and normalized output y(n)/G (where G is linear gain)
  • Step 2: Train the RVTDNN to map y(n)/G → z(n), learning the post-inverse
  • Step 3: Deploy the trained weights as the predistorter: x(n) → z(n) This approach guarantees convergence to the optimal predistorter under the assumption that the PA is invertible and the model has sufficient capacity.
RVTDNN ARCHITECTURE

Frequently Asked Questions

Clear answers to common questions about the Real-Valued Time-Delay Neural Network, its role in digital pre-distortion, and how it compares to alternative modeling approaches.

A Real-Valued Time-Delay Neural Network (RVTDNN) is a feedforward neural network architecture designed for digital pre-distortion (DPD) that processes the in-phase (I) and quadrature (Q) components of a baseband signal as separate real-valued input streams. Unlike complex-valued networks that treat I/Q as a single complex entity, the RVTDNN explicitly models the non-linear dynamics of a power amplifier by applying tapped delay lines to each real-valued input. This structure captures memory effects—the dependence of the amplifier's current output on past inputs—by feeding a temporal window of I and Q samples into the network simultaneously. The architecture is a direct neural implementation of the memory polynomial model, where hidden layer neurons learn the non-linear basis functions and the output layer reconstructs the predistorted I and Q components. RVTDNNs are trained using the Indirect Learning Architecture (ILA) or Direct Learning Architecture (DLA) to minimize the error between the desired linear output and the actual amplifier response.

ARCHITECTURE COMPARISON

RVTDNN vs. Other DPD Neural Network Architectures

Comparative analysis of neural network topologies for digital pre-distortion linearization, highlighting key differences in temporal modeling, computational complexity, and linearization performance.

FeatureRVTDNNAugmented RVTDNNVector-Processed NN

Input Representation

Real-valued I and Q components processed separately

Real-valued I, Q, and envelope-dependent terms

Complex baseband (I+jQ) processed as single entity

Temporal Modeling Mechanism

Tapped delay lines on I and Q branches independently

Tapped delay lines with additional cross-term memory taps

Complex-valued FIR filters or recurrent connections

Memory Effect Capture

Linear memory via time-delay embedding

Non-linear memory via envelope-dependent delay terms

Linear and non-linear memory via complex weights

AM-AM/AM-PM Modeling

Implicitly learned through real-valued weight optimization

Explicitly modeled via envelope-dependent input features

Directly modeled through complex-valued activation functions

Computational Complexity

Moderate (2x real-valued operations)

Higher (additional envelope feature computation)

Lower (single complex-valued path)

Training Convergence

Stable with standard backpropagation

Slower due to increased parameter count

Requires complex backpropagation (Wirtinger calculus)

Hardware Implementation Suitability

ACLR Improvement (typical)

15-20 dB

18-25 dB

15-22 dB

Prasad Kumkar

About the author

Prasad Kumkar

CEO & MD, Inference Systems

Prasad Kumkar is the CEO & MD of Inference Systems and writes about AI systems architecture, LLM infrastructure, model serving, evaluation, and production deployment. Over 5+ years, he has worked across computer vision models, L5 autonomous vehicle systems, and LLM research, with a focus on taking complex AI ideas into real-world engineering systems.

His work and writing cover AI systems, large language models, AI agents, multimodal systems, autonomous systems, inference optimization, RAG, evaluation, and production AI engineering.