A Doherty Power Amplifier is a load-modulation architecture invented by William H. Doherty in 1936 that achieves high power-added efficiency (PAE) at backed-off power levels. It consists of a Class-AB or Class-B main amplifier operating continuously and a Class-C peaking amplifier that activates only during high-power signal peaks. A quarter-wave impedance inverter at the output combines the two paths, dynamically modulating the load impedance seen by the main amplifier as the peaking amplifier turns on, thereby maintaining near-peak efficiency across a 6 dB or greater output power back-off range.
Glossary
Doherty Power Amplifier

What is a Doherty Power Amplifier?
The Doherty power amplifier is a high-efficiency RF amplifier architecture that combines a main (carrier) amplifier and a peaking (auxiliary) amplifier connected through an impedance inverting network to maintain efficiency over a wide range of output power back-off levels.
While the Doherty architecture dramatically improves efficiency for signals with high peak-to-average power ratio (PAPR) such as OFDM, it introduces severe AM-AM and AM-PM non-linearity at the transition point where the peaking amplifier engages. This inherent non-linearity, compounded by strong memory effects from the impedance inverter and device parasitics, makes the Doherty amplifier a primary candidate for advanced digital pre-distortion (DPD) techniques. Modern implementations often employ neural network DPD or generalized memory polynomial (GMP) models to linearize the complex, dynamic distortion characteristic of this architecture.
Key Characteristics of Doherty Amplifiers
The Doherty power amplifier is a high-efficiency architecture that combines a main (carrier) and a peaking (auxiliary) amplifier via an impedance inverting network. Its unique active load-pull modulation enables high efficiency at backed-off power levels, but introduces severe non-linearity that demands advanced digital pre-distortion.
Active Load-Pull Modulation
The defining mechanism of the Doherty architecture. As input power increases, the peaking amplifier turns on and injects current into the combining node. This dynamically modulates the impedance seen by the main amplifier, allowing it to maintain voltage saturation and peak efficiency over a 6 dB power back-off range.
- Low power: Only the main amplifier operates, seeing a high impedance (typically 2×Ropt)
- Peak power: Both amplifiers contribute, and the main amplifier's load is pulled down to its optimal impedance (Ropt)
- This impedance trajectory is the source of both the efficiency gain and the complex non-linearity
Asymmetric Branch Operation
The main (Class-AB or Class-B biased) and peaking (Class-C biased) amplifiers operate with fundamentally different conduction angles and turn-on thresholds. This asymmetry creates a composite transfer characteristic that is inherently non-linear.
- Main amplifier: Always conducting, handles the linear portion of the signal
- Peaking amplifier: Cut off below the transition point, conducts only during envelope peaks
- The abrupt turn-on of the peaking amplifier introduces a gain expansion region that must be compensated by DPD
- Modern designs may use asymmetric power splitting ratios (e.g., 1:1.5) to optimize the efficiency peak
Quarter-Wave Impedance Inverter
A transmission line of precisely λ/4 electrical length at the carrier frequency sits between the main amplifier output and the combining node. This network performs the critical impedance inversion that enables load modulation.
- Transforms a decreasing impedance at the combining node into an increasing impedance at the main amplifier's drain
- The relationship follows: Z_main × Z_combining = Z0²
- Bandwidth limitations arise because the inverter is exactly λ/4 at only one frequency
- Wideband Doherty designs employ Klopfenstein tapers or multi-section matching to extend bandwidth
Efficiency vs. Linearity Trade-off
The Doherty architecture achieves power-added efficiency (PAE) of 50-65% at 6-8 dB back-off, compared to 20-30% for a comparable Class-AB amplifier. This efficiency comes at the cost of severe amplitude and phase distortion.
- AM-AM distortion: Gain compression at low power, expansion near the transition point, and compression at saturation
- AM-PM distortion: Phase shift varies by 10-30 degrees across the power range due to the peaking amplifier's variable input impedance
- Memory effects: Thermal and trapping effects differ between the two branches, creating asymmetric long-term memory
- DPD must model a 3D surface of gain and phase vs. instantaneous power and envelope history
Doherty-Outphasing Hybrids
Advanced variants combine Doherty load modulation with outphasing (Chireix) principles. In these architectures, the main and peaking amplifiers are driven with phase-controlled signals, and reactive compensation elements are added to the combining network.
- Extends the high-efficiency range beyond the classic 6 dB back-off limit
- Chireix compensation elements (shunt reactances) cancel the reactive component of the load modulation
- Enables efficiency peaks at 9-12 dB back-off for high-PAPR signals like 5G OFDM
- The additional phase control dimension increases DPD complexity significantly
Bandwidth Constraints
Conventional Doherty amplifiers are inherently narrowband due to the frequency-dependent behavior of the quarter-wave inverter and the combining network. For 5G applications requiring 100-400 MHz instantaneous bandwidth, significant design modifications are required.
- Limiting factors: Impedance inverter dispersion, device output capacitance, and package parasitics
- Post-matching topology: Places the impedance inverter after a broadband matching network to decouple bandwidth from load modulation
- Digital Doherty: Uses dual-input architecture with separate digital predistortion per path, eliminating the analog combining network
- Continuous-mode Doherty designs absorb device parasitics into the matching network for octave-bandwidth operation
Frequently Asked Questions
Clear, technically precise answers to the most common questions about the Doherty power amplifier architecture, its non-linear behavior, and the advanced linearization techniques required to make it viable for modern high-PAPR communication signals.
A Doherty power amplifier is a high-efficiency RF amplifier architecture that combines a main (carrier) amplifier operating in Class-AB and a peaking (auxiliary) amplifier operating in Class-C, connected through an impedance inverting network. The main amplifier handles low to medium power levels, while the peaking amplifier turns on during high-power peaks. The quarter-wave impedance inverter at the output modulates the load impedance seen by the main amplifier as the peaking amplifier's current contribution changes. This active load modulation maintains the main amplifier near its peak efficiency point across a wide range of input powers, typically achieving a 6-10 dB output back-off efficiency improvement over a standard Class-AB design. The architecture was invented by William H. Doherty in 1936 for broadcast transmitters and is now ubiquitous in 4G LTE and 5G NR base stations where signals exhibit high peak-to-average power ratios (PAPR) exceeding 10 dB.
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Related Terms
Understanding the Doherty power amplifier requires familiarity with its core operating principles, the specific distortions it generates, and the advanced linearization techniques required to make it viable for modern high-bandwidth signals.
Load Modulation
The fundamental operating principle of the Doherty architecture. As the peaking amplifier turns on, it injects current into the combining node, which actively modulates the effective load impedance seen by the main amplifier. This dynamic impedance transformation allows the main amplifier to remain in saturation—and thus at peak efficiency—over a wide range of input power levels, rather than only at the peak envelope.
AM-PM Distortion
While all power amplifiers exhibit AM-PM, the Doherty configuration is particularly notorious for severe phase distortion. The non-linear parasitic capacitances of the peaking amplifier, which vary dramatically as it transitions from the off-state to saturation, cause a sharp phase shift as a function of instantaneous input power. This steep phase discontinuity is the primary challenge for DPD systems, requiring models with strong memory and high non-linear order to compensate.
Peaking Amplifier Biasing
The bias point of the peaking amplifier defines the Doherty's efficiency profile. Classic designs use Class-C biasing, where the peaking device is deeply pinched off and only conducts during signal peaks above a threshold (typically 6 dB back-off). This maximizes efficiency but introduces a hard turn-on non-linearity. Modern designs may use Class-B or adaptive biasing to smooth the transition, trading some efficiency for improved linearity and reduced DPD complexity.
Impedance Inverter Network
A quarter-wave transmission line placed at the output of the main amplifier. Its function is to invert the load impedance modulation: when the peaking amplifier injects current and lowers the common node impedance, the inverter transforms this to a higher impedance at the main amplifier's drain. This allows the main device to swing a larger voltage without exceeding its current limit, delivering more power while remaining in saturation.
Neural Network DPD
Traditional polynomial-based DPD models like the Generalized Memory Polynomial (GMP) often struggle with the sharp, localized non-linearity of the Doherty turn-on region. Neural network architectures—particularly Real-Valued Time-Delay Neural Networks (RVTDNN) and recurrent networks—excel at modeling these discontinuous behaviors. They learn a continuous, high-dimensional manifold that captures the complex interplay between the Doherty's load modulation, thermal memory, and trapping effects.
Asymmetric Doherty Design
In a symmetric Doherty, the main and peaking amplifiers are identical. An asymmetric Doherty uses a larger peaking device (e.g., a 2:1 power ratio) to extend the high-efficiency back-off range beyond 6 dB. This is critical for signals with a high Peak-to-Average Power Ratio (PAPR) , such as 5G OFDM waveforms. The trade-off is an even more complex non-linear profile, as the impedance modulation ratio and turn-on dynamics become more aggressive.

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Prasad Kumkar
CEO & MD, Inference Systems
Prasad Kumkar is the CEO & MD of Inference Systems and writes about AI systems architecture, LLM infrastructure, model serving, evaluation, and production deployment. Over 5+ years, he has worked across computer vision models, L5 autonomous vehicle systems, and LLM research, with a focus on taking complex AI ideas into real-world engineering systems.
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