Transient Voltage Sag

The instantaneous voltage drop is governed by Ohm's law: V_sag = I_inrush × ESR. The ESR of the decoupling network—dominated by capacitor ESR, PCB trace resistance, and bond wire resistance—is a unique, fabrication-dependent parameter. Even identical capacitor part numbers exhibit manufacturing variance in ESR, creating a device-specific sag magnitude that cannot be cloned. This resistance is typically measured in milliohms, and the resulting sag ranges from tens to hundreds of millivolts.

The temporal shape of the sag is defined by the RLC time constant of the power distribution network (PDN). The recovery from the sag is not instantaneous; it follows an exponential or underdamped trajectory determined by:

• Decoupling capacitance (C): The total charge reservoir available
• Parasitic inductance (L): The loop inductance limiting current slew rate
• ESR (R): The resistive damping factor

The settling time—the duration until the rail returns to within 1% of nominal—is a highly repeatable hardware metric.

The sag is the response to a stimulus—the transient inrush current demanded by the power amplifier (PA) and digital logic. This current profile is itself a fingerprint, shaped by:

• The PA gate biasing network charging characteristics
• The clock buffer startup sequence
• The DAC output stage slewing

The convolution of this unique current excitation with the unique PDN impedance creates a device-specific voltage perturbation that is measurable on the supply rail.

Capturing the sag requires high-bandwidth differential probing directly at the supply pins. Key extraction parameters include:

• Peak sag magnitude: The maximum voltage deviation from nominal
• dV/dt: The rate of voltage drop, indicating the current slew rate
• Recovery slope: The exponential time constant of the return to regulation
• Ringing frequency: The resonant frequency of the PDN's LC tank if underdamped

These features are typically extracted in the time domain using high-sample-rate digitizers (≥1 GS/s).

Transient voltage sag is fundamentally distinct from steady-state power supply ripple. Ripple is a continuous, periodic perturbation caused by switching regulator operation. Sag is a single-shot, aperiodic event triggered by the burst onset. The sag reveals the large-signal transient response of the PDN, while ripple reflects the small-signal steady-state impedance. Fingerprinting systems exploit the sag because it exercises the PDN in a non-linear regime that exposes component tolerances more dramatically.

The sag profile exhibits predictable drift over time and temperature. ESR of electrolytic and ceramic capacitors increases with aging and decreases with temperature. This drift must be tracked by the fingerprinting algorithm. Key behaviors:

• Cold start: Higher ESR, deeper sag
• Warm operation: Lower ESR, shallower sag
• Capacitor aging: Monotonic ESR increase over years

Drift compensation algorithms model these physical effects to maintain authentication accuracy across the device lifecycle.

The causal event that directly produces the transient voltage sag. When a transmitter's power amplifier and digital logic are energized, they draw a high initial current surge. The magnitude, rise time, and shape of this inrush current are dictated by the power distribution network (PDN) impedance. This current spike flowing through the non-zero impedance of the power supply traces and decoupling network creates the corresponding voltage droop measured on the rail.

The dominant parasitic parameter determining the depth of the transient voltage sag. ESR is the real, resistive component of a capacitor's impedance. During the high-frequency current inrush, the voltage drop across the decoupling capacitor's ESR (V = I * R) is instantaneous. A higher ESR, often due to aging or manufacturing variance, directly produces a deeper and uniquely shaped voltage sag, making it a prime hardware fingerprinting feature.

The complete electrical path from the voltage regulator module to the transmitter die, including PCB traces, vias, and decoupling capacitors. The PDN impedance profile over frequency dictates the transient response. A poorly damped PDN with high parasitic inductance will cause ringing artifacts superimposed on the voltage sag, while a well-damped network produces a smooth, monotonic recovery. These unique impedance characteristics form an unclonable hardware signature.

The direct consequence of the voltage sag on the transmitted RF signal. The momentary fluctuation in the supply voltage amplitude-modulates the power amplifier's output. This creates a unique envelope distortion during the ramp-up phase. The conversion of the voltage sag into an RF artifact means the power supply signature is imprinted onto the radiated waveform, allowing for non-intrusive fingerprinting without physical probing.

The measurement of the duration required for the supply voltage rail to recover and stabilize within a specified tolerance (e.g., ±1%) after the initial sag. This settling time reveals the time constants of the PDN's RLC network. Variations in the recovery trajectory—whether exponential, underdamped, or critically damped—are driven by component tolerances and provide a distinct temporal feature for emitter identification.

A complementary artifact to the voltage sag occurring on the ground reference plane. When the inrush current flows through the parasitic inductance of IC bond wires and package pins, it induces a voltage spike on the internal ground. This ground bounce simultaneously affects the reference potential for all circuits, causing correlated distortions in the IQ modulator and oscillator that contribute additional identifying features to the transient fingerprint.