Transient Frequency Trajectory

The frequency trajectory is a direct window into the phase-locked loop (PLL) control system. Key observable characteristics include:

• Loop bandwidth: Determines the speed of frequency correction and noise filtering
• Damping factor: Controls overshoot and ringing during lock acquisition
• Natural frequency: The resonant frequency of the loop, dictating settling behavior
• Phase margin: Influences stability and transient response shape

Component tolerances in the loop filter—specifically resistor and capacitor values—create unique, device-specific settling profiles that serve as robust hardware fingerprints.

During the turn-on transient, the voltage-controlled oscillator (VCO) is highly susceptible to external disturbances that imprint unique signatures on the frequency trajectory:

• Load pulling: Sudden impedance changes from the power amplifier turn-on momentarily shift the VCO frequency
• Supply pushing: Transient current inrush causes voltage sag on the VCO supply rail, modulating the output frequency
• Thermal transients: Instantaneous self-heating of the oscillator transistor junction alters its electrical characteristics

These coupled electro-thermal-mechanical effects are deterministic and repeatable for a given device, making them ideal for fingerprinting.

Settling time is the duration required for the carrier frequency to enter and remain within a specified error band (typically ±1 ppm) around the final steady-state value. This metric decomposes into:

• Acquisition time: The initial coarse frequency pull-in phase
• Tracking time: The fine convergence phase where phase error is minimized
• Residual frequency error: The final static offset due to reference oscillator inaccuracy

Variations in settling time across units—caused by PLL charge pump current mismatches and loop filter capacitor tolerances—provide a distinguishing temporal feature for emitter identification.

An underdamped PLL response produces a characteristic frequency overshoot beyond the target lock frequency, followed by damped oscillatory ringing. Key fingerprinting features include:

• Peak overshoot magnitude: The maximum frequency excursion above steady-state, expressed as a percentage
• Ringing frequency: The oscillation rate of the decaying envelope, determined by the loop filter's reactive components
• Decay time constant (τ): The exponential rate at which ringing amplitude diminishes, revealing the energy dissipation characteristics

These parameters are highly sensitive to passive component values and parasitic circuit elements, creating a unique damped oscillation profile per device.

Superimposed on the macro-level settling trajectory is a continuous, short-term instantaneous frequency drift caused by:

• Thermal transients: Junction temperature changes in the VCO tank circuit alter capacitance and inductance values
• Charge pump leakage: Current leakage in the PLL charge pump causes a slow frequency walk during the transient
• Reference oscillator warm-up: The crystal reference itself undergoes a micro-frequency shift as it reaches thermal equilibrium

This drift is typically modeled as a polynomial or exponential function whose coefficients serve as device-specific feature vectors for machine learning classifiers.

The transient phase trajectory is the path traced by the instantaneous phase of the signal in the complex (I/Q) plane during frequency settling. This representation reveals:

• Phase discontinuity: Abrupt jumps caused by non-ideal switching in the frequency synthesis chain
• Spiral convergence: The characteristic inward spiral as the PLL reduces phase error toward lock
• Phase rotation rate: The instantaneous angular velocity, which directly corresponds to the frequency error

Plotting the differential phase trajectory—the vector difference between successive samples—amplifies subtle hardware-specific artifacts and suppresses common-mode channel effects.

The complete time-domain trajectory of the instantaneous carrier frequency as it converges from its initial turn-on deviation to its final steady-state value. This profile is a direct visualization of the phase-locked loop (PLL) dynamics and reveals the loop filter's damping factor, natural frequency, and component tolerances. Key characteristics include:

• Lock time: The total duration to reach within a specified ppm error
• Overshoot: The peak frequency excursion beyond the target lock frequency
• Ringing: Damped oscillations indicating an underdamped loop response

The settling profile is highly unique because it depends on passive component values (resistors, capacitors) that typically have 5-10% manufacturing variance.

The precise duration required for a phase-locked loop to synchronize its output oscillator with an external reference signal after power-up or a channel change. During this interval, the PLL's phase detector, charge pump, and loop filter are in a non-linear acquisition mode, exposing the unique dynamic characteristics of each component. The lock time is influenced by:

• The loop bandwidth setting
• Charge pump current mismatches
• Voltage-controlled oscillator (VCO) gain (Kvco) variations
• Loop filter capacitor dielectric absorption

These parameters vary from chip to chip due to semiconductor process variation, making lock time a robust identifying feature.

The dynamic behavior of the voltage-controlled oscillator during the start-up period, before the PLL has established stable feedback control. This response is dominated by:

• Frequency pushing: The VCO frequency shift caused by power supply voltage fluctuations during the inrush current event
• Frequency pulling: The VCO frequency shift caused by the changing impedance of the load (power amplifier) as it transitions from off to on
• Thermal transients: Rapid frequency drift as the oscillator transistor junction self-heats

The VCO's free-running behavior during this brief open-loop period imprints a unique, unclonable signature on the carrier frequency trajectory.

The continuous, short-term variation in the carrier frequency observed during the transient period, distinct from the intentional settling trajectory. This drift is caused by:

• Thermal transients in the VCO's resonant tank components
• Charge trapping in the PLL's loop filter capacitors
• Power supply modulation as the regulator recovers from the inrush current

The drift pattern is typically modeled as a decaying exponential with device-specific time constants. Unlike steady-state phase noise, this drift is deterministic and repeatable for a given device, making it a valuable transient fingerprint feature.

The path traced by the instantaneous phase of the signal in the complex (I/Q) plane during the transient period. While the frequency trajectory captures the rate of phase change, the phase trajectory reveals the absolute phase evolution, including:

• Phase discontinuities: Abrupt jumps caused by non-ideal switching in the frequency synthesis chain
• Spiral patterns: Smooth phase rotations as the PLL corrects the initial frequency error
• Settling arcs: The convergence of the phase to its steady-state relationship with the reference

This trajectory is extracted using the Hilbert transform to compute the analytic signal, and it provides a complementary view to the frequency-domain analysis.

The complete time-domain response of the phase-locked loop as it transitions from an unlocked to a locked state. This encompasses the entire acquisition process and is characterized by:

• Frequency acquisition: The initial pull-in where the frequency error is reduced
• Phase acquisition: The subsequent alignment of the VCO phase with the reference
• Cycle slipping: Momentary phase errors exceeding 2π radians during aggressive acquisition

The settling transient is highly sensitive to the PLL's loop filter component values. A 5% variation in a capacitor value can produce a measurably different overshoot and ringing pattern, creating a distinct hardware signature.