TinyML is the intersection of embedded systems and machine learning, deploying optimized neural networks onto resource-constrained microcontrollers (MCUs) that often operate on milliwatts or microwatts of power. It enables real-time, always-on sensor analytics—such as keyword spotting, anomaly detection, and gesture recognition—directly on the physical device without requiring cloud connectivity or gateway intermediaries.
Glossary
TinyML

What is TinyML?
TinyML is a field of machine learning technologies and applications capable of performing on-device sensor data analytics at extremely low power, typically on microcontrollers.
Deploying models in this environment requires aggressive optimization using techniques like model quantization, weight pruning, and knowledge distillation to fit within kilobytes of RAM and flash storage. Frameworks such as TensorFlow Lite Micro provide the runtime necessary to execute inference on Arm Cortex-M class processors, enabling battery-powered devices to run continuously for years on a single coin cell.
Core Characteristics of TinyML
TinyML is defined by a set of extreme engineering constraints that distinguish it from mobile or cloud AI. These core characteristics dictate the software architectures, model design choices, and hardware platforms used to achieve meaningful intelligence on milliwatt power budgets.
Ultra-Low Power Consumption
The foundational constraint of TinyML is operating on a strict energy diet, typically drawing single-digit milliwatts or microwatts of power. This enables years of continuous operation on a single coin-cell battery or energy-harvested power.
- Always-on capability: Devices remain active for sensor data analysis without a sleep/wake duty cycle.
- Peak current limits: Models must avoid sudden current spikes that can cause voltage droop in small batteries.
- Target: < 1 mW for keyword spotting, < 10 mW for visual wake words.
- Enabler: This constraint forces the use of microcontrollers rather than application processors.
Kilobyte-Scale Memory Footprint
TinyML models must fit within the severely constrained SRAM and Flash of microcontroller-class hardware, often totaling less than 512 KB of total memory.
- SRAM budget: Typically 128–256 KB for runtime activations and intermediate tensors.
- Flash budget: 512 KB–2 MB for storing model weights and application code.
- Implication: Standard neural networks must be aggressively compressed using quantization, pruning, and knowledge distillation.
- Contrast: A standard MobileNet model is ~4 MB; a TinyML equivalent is often < 100 KB.
Bare-Metal or RTOS Execution
TinyML workloads run without the overhead of a full operating system like Linux. They execute on bare-metal or on a lightweight Real-Time Operating System (RTOS).
- No OS overhead: Eliminates context switching, memory management unit paging, and driver bloat.
- Deterministic latency: RTOS guarantees that inference completes within a fixed time window, critical for control loops.
- Direct hardware access: Code interfaces directly with peripherals like I2S microphones and accelerometers.
- Example: TensorFlow Lite Micro is an interpreter designed specifically for this bare-metal environment.
Sensor-Integrated Processing
TinyML is architecturally co-located with the sensor, performing on-device analytics directly on the raw data stream without transmitting it elsewhere.
- Data minimization: Only high-level inferences or alerts are sent off-device, preserving privacy and reducing radio energy.
- Closed-loop control: Enables immediate actuation based on sensor input without cloud round-trip latency.
- Sensor fusion: Combines inputs from multiple low-power sensors (IMU, microphone, ambient light) to improve inference accuracy.
- Example: An accelerometer paired with a Cortex-M4 running a convolutional neural network for real-time vibration anomaly detection.
Integer-Only Arithmetic
To achieve efficiency on microcontrollers without floating-point units, TinyML models rely on 8-bit integer quantization and integer-only arithmetic kernels.
- Quantization: Converts 32-bit floating-point weights and activations to INT8 or even lower bit-widths.
- Hardware alignment: Matches the instruction set of ARM Cortex-M SIMD operations.
- No FPU dependency: Runs efficiently on low-cost MCUs like the ARM Cortex-M0 or M3 that lack hardware floating-point support.
- Trade-off: A small, controlled loss in numerical precision is accepted for a 4x reduction in model size and significant speedup.
Single-Purpose Inference
Unlike general-purpose AI assistants, a TinyML model is deployed to perform a single, highly specific task continuously and reliably.
- Task specialization: Examples include keyword spotting, person detection, predictive maintenance, or gesture recognition.
- No dynamic loading: The entire model is statically compiled and flashed onto the device as a fixed computational graph.
- Reliability focus: The narrow scope allows for exhaustive validation and deterministic behavior in safety-critical applications.
- Contrast: This is fundamentally different from a smartphone running multiple heterogeneous AI models managed by a scheduler.
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Frequently Asked Questions
Concise answers to the most common technical questions about deploying machine learning on microcontrollers and ultra-low-power devices.
TinyML is a field of machine learning technologies and applications capable of performing on-device sensor data analytics at extremely low power, typically on microcontrollers. It works by deploying highly optimized neural networks that have been compressed using techniques like model quantization and weight pruning to fit within the severe memory constraints of embedded hardware. These models run inference directly on the sensor node, processing data locally to eliminate the latency and energy cost of wireless transmission. A typical TinyML pipeline involves training a model in a full-precision framework like TensorFlow, converting it to a lightweight format such as TensorFlow Lite Micro, and flashing it onto an Arm Cortex-M class microcontroller consuming milliwatts of power.
Related Terms
TinyML does not exist in isolation. It relies on a stack of specialized optimization, hardware, and software technologies to function within milliwatt power budgets.
Model Quantization
The foundational compression technique that reduces numerical precision of weights and activations from 32-bit floats to 8-bit integers. Post-Training Quantization (PTQ) converts models after training, while Quantization-Aware Training (QAT) simulates low-precision during training to preserve accuracy. This is the primary enabler for fitting neural networks onto microcontrollers.
Knowledge Distillation
A compression technique where a compact student model is trained to mimic the output distribution of a larger teacher model. Instead of training on hard labels, the student learns from the teacher's softened logits. This transfers inductive biases without requiring the original training data, making it ideal for creating TinyML-ready architectures from complex models.
Weight Pruning
An optimization strategy that removes redundant parameters from a neural network. Magnitude-based pruning eliminates weights closest to zero, while structured pruning removes entire channels or filters. The result is a sparse model that requires fewer multiply-accumulate operations and less storage, directly reducing inference latency on constrained hardware.
Operator Fusion
A graph optimization technique that combines multiple discrete neural network operations into a single kernel. For example, fusing a convolution, batch normalization, and ReLU activation eliminates intermediate memory reads and writes. This reduces memory bandwidth pressure—often the primary bottleneck in microcontroller-class devices with limited SRAM.

About the author
Prasad Kumkar
CEO & MD, Inference Systems
Prasad Kumkar is the CEO & MD of Inference Systems and writes about AI systems architecture, LLM infrastructure, model serving, evaluation, and production deployment. Over 5+ years, he has worked across computer vision models, L5 autonomous vehicle systems, and LLM research, with a focus on taking complex AI ideas into real-world engineering systems.
His work and writing cover AI systems, large language models, AI agents, multimodal systems, autonomous systems, inference optimization, RAG, evaluation, and production AI engineering.
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