Effective Number of Bits (ENOB)

ENOB is derived directly from the measured SINAD of a converter. The standard formula is:

ENOB = (SINAD_dB - 1.76) / 6.02

• SINAD: The ratio of the fundamental signal power to the total power of all other spectral components, including noise and harmonic distortion.
• 1.76 dB: A constant representing the theoretical quantization noise of an ideal ADC for a full-scale sine wave.
• 6.02 dB: The factor representing the theoretical signal-to-noise ratio improvement gained by adding one ideal bit of resolution.

A 16-bit ADC with a measured SINAD of 86 dB yields an ENOB of approximately 14 bits, indicating that 2 bits of resolution are lost to real-world imperfections.

ENOB is not a static specification but a dynamic, frequency-dependent metric that varies with input signal amplitude and frequency. This variation creates a unique, multi-dimensional signature for each device.

• Frequency Dependency: ENOB degrades at higher input frequencies due to aperture jitter and slew-rate limiting. The shape of this roll-off curve is device-specific.
• Amplitude Dependency: At low signal levels, DNL errors and thermal noise dominate, while at high levels, harmonic distortion from INL is the primary limiter.
• Composite Indicator: Because ENOB aggregates the effects of quantization error, thermal noise, jitter, and static/dynamic non-linearity, it serves as a single, high-entropy feature for distinguishing between nominally identical converters.

Multiple physical impairment mechanisms combine to reduce a converter's ENOB from its ideal value. The dominant sources include:

• Aperture Jitter: Timing uncertainty in the sampling clock creates a voltage error proportional to the signal's slew rate. This is often the primary ENOB limiter at high input frequencies.
• Thermal Noise (kT/C): Broadband noise from resistive components and switched-capacitor networks sets the fundamental noise floor, directly reducing SINAD.
• Static Non-Linearity (INL/DNL): Deviations from the ideal transfer function generate harmonic distortion and intermodulation products, which are included in the SINAD denominator.
• Missing Codes: Severe DNL errors create gaps in the transfer function, introducing distortion that further degrades the effective resolution.

The gap between a converter's nominal bit-width and its measured ENOB represents the total information lost to analog imperfections. This gap is a rich source of identifying features.

• Noise-Limited Region: At low frequencies, the ENOB is primarily limited by thermal noise and quantization noise. The difference between ideal and effective bits indicates the noise floor.
• Distortion-Limited Region: At high frequencies, harmonic distortion and intermodulation distortion dominate, causing a steeper ENOB roll-off.
• Clock-Limited Region: For very high-speed converters, clock jitter and phase noise become the ultimate bottleneck, imposing a hard ceiling on achievable ENOB regardless of input frequency.

A 14-bit converter operating at 100 MHz with an ENOB of 10.5 bits reveals a 3.5-bit loss, the precise characteristics of which form a unique hardware signature.

Accurate ENOB measurement requires a controlled test setup to isolate the Device Under Test (DUT) from external impairments.

• Coherent Sampling: The input signal and sampling clock must be phase-locked to ensure a clean FFT without spectral leakage, allowing precise SINAD measurement.
• High-Purity Signal Source: The analog input sine wave must have significantly better spectral purity than the expected ENOB of the DUT to avoid corrupting the measurement.
• Over-Sampling and Averaging: Multiple FFT records are averaged to reduce the variance of the noise floor estimate, providing a more stable and repeatable ENOB value.
• Frequency Sweep: ENOB is measured across a range of input frequencies to characterize the full dynamic performance curve, revealing the transition from thermal-noise-limited to jitter-limited operation.

In Time-Interleaved ADCs, multiple sub-converters sample sequentially to achieve a higher aggregate sample rate. The mismatches between these sub-ADCs create a unique, periodic degradation pattern in the ENOB.

• Interleaving Spurs: Gain, offset, and timing mismatches between sub-ADCs produce deterministic spurs at specific frequency offsets. These spurs are included in the SINAD calculation, directly reducing ENOB.
• Periodic Signature: The pattern of mismatch spurs repeats at multiples of the sub-ADC sampling rate, creating a highly structured, exploitable fingerprint.
• Calibration Residue: Even after digital calibration, residual mismatches leave a faint but persistent signature that can be extracted for device identification.

This architecture-specific degradation makes time-interleaved converters particularly rich sources of RF fingerprinting features.