Inferensys

Glossary

Arithmetic Circuit

A directed acyclic graph representing a computation as a series of addition and multiplication gates over a finite field, serving as the foundational representation for ZKP systems.
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COMPUTATIONAL REPRESENTATION

What is an Arithmetic Circuit?

An arithmetic circuit is a directed acyclic graph (DAG) that represents a computation as a sequence of addition and multiplication gates over a finite field, serving as the foundational computational model for encoding statements in zero-knowledge proof systems.

An arithmetic circuit is a mathematical model of computation consisting of a directed acyclic graph (DAG) where inputs flow through addition and multiplication gates to produce outputs. Unlike Boolean circuits that operate on bits, arithmetic circuits perform operations over a finite field (e.g., F_p), making them the native representation for encoding machine learning operations—such as matrix multiplications and activation functions—into a format provable by zkSNARKs and zkSTARKs.

The efficiency of a zero-knowledge proof is directly tied to the circuit's gate count and depth. A computation expressed with fewer multiplication gates yields faster prover times. This drives the design of zkML systems, where complex non-linear functions like ReLU or softmax must be carefully arithmetized. Related concepts include the constraint system, which formally encodes the circuit's valid execution traces, and polynomial commitments, which cryptographically bind the prover to the circuit's wiring without revealing the private witness values.

FOUNDATIONAL COMPUTATION

Core Properties of Arithmetic Circuits

An arithmetic circuit is a directed acyclic graph (DAG) representing a computation as a series of addition and multiplication gates over a finite field. It serves as the foundational computational representation that a prover must satisfy to generate a valid zero-knowledge proof.

01

Directed Acyclic Graph Structure

The computation is modeled as a directed acyclic graph (DAG) where edges represent data flow. Sources are input nodes, sinks are output nodes, and internal nodes are gates. The acyclic property ensures no feedback loops, making the computation deterministic and bounded. This structure maps directly to real-world programs: every loop must be unrolled to a fixed number of iterations, and every conditional branch must be executed as a multiplexed selection of both paths.

02

Addition and Multiplication Gates

All computations are decomposed into only two fundamental operations:

  • Addition gates: Compute the sum of two input wires modulo the field characteristic
  • Multiplication gates: Compute the product of two input wires modulo the field characteristic

This constraint to two gate types is not a limitation but a feature—it enables the algebraic structure required by polynomial commitment schemes and constraint systems. Non-arithmetic operations like bitwise XOR or hash functions must be expressed as compositions of these gates, which is why STARK-friendly hashes like Poseidon are designed to minimize multiplication gate count.

03

Finite Field Arithmetic

All values in an arithmetic circuit exist within a finite field F_p, typically a large prime field like the BN254 scalar field or BLS12-381 scalar field. This is critical because:

  • No floating-point errors: All operations are exact, eliminating rounding discrepancies between prover and verifier
  • Cryptographic soundness: The field size determines the security level against algebraic attacks
  • Modular arithmetic: Values wrap around the field modulus, requiring careful handling of overflow in integer computations

The choice of field directly impacts proof generation speed and the compatibility with elliptic curve pairings used in zkSNARKs.

04

Circuit Satisfiability

A circuit is satisfiable if there exists an assignment of values to all wires—including the secret witness inputs—such that every gate's output correctly matches its operation on its inputs. The prover's task is to demonstrate knowledge of such an assignment without revealing it. This is formalized as:

  • Public inputs: Known to both prover and verifier (e.g., the model's output hash)
  • Private witness: Known only to the prover (e.g., model weights, input data)

The circuit encodes the statement 'I know a witness w such that C(x, w) = 0' where C is the circuit's constraint polynomial.

05

Constraint System Encoding

Arithmetic circuits are typically compiled into a Rank-1 Constraint System (R1CS) or a Plonkish constraint system before proof generation. This transformation:

  • Converts each gate into a quadratic constraint of the form (a · s) × (b · s) = (c · s)
  • Produces matrices that encode the entire circuit's wiring and gate operations
  • Enables the application of polynomial interactive oracle proofs (PIOPs)

The number of constraints directly correlates with prover time—optimizing circuit design to minimize constraints is a critical engineering discipline in zkML applications where models may have millions of parameters.

06

Non-Arithmetic Operation Handling

Real-world computations involve operations beyond addition and multiplication. These are handled through:

  • Lookup arguments: Prove a value exists in a precomputed table (e.g., a correct XOR result) without computing it via gates
  • Bit decomposition: Represent integers as binary wires and verify bitwise operations through arithmetic constraints
  • Range proofs: Prove a value lies within a specific interval using techniques from Bulletproofs
  • Gadget libraries: Reusable circuit components for common operations like hashing, signature verification, and matrix multiplication

In zkML, activation functions like ReLU are implemented as a combination of range checks and multiplexing, while softmax requires approximation via polynomial evaluation.

COMPUTATIONAL MODELS

Arithmetic Circuit vs. Boolean Circuit

A comparison of the two fundamental circuit representations used in cryptographic proving systems and hardware design, highlighting their distinct gate operations and application domains.

FeatureArithmetic CircuitBoolean Circuit

Fundamental Gate Types

Addition (+) and Multiplication (×)

AND, OR, NOT, XOR, NAND

Data Unit

Field elements (e.g., integers modulo p)

Single bits (0 or 1)

Native Operation

Polynomial evaluation over a finite field

Logical satisfiability

Primary Use in ZKPs

Proving integrity of ML inference, matrix multiplication

Proving SHA-256 hashing, signature verification

Efficiency for Addition

Native (single gate)

Requires cascading full-adders (multiple gates)

Efficiency for Bitwise Operations

Requires bit-decomposition (many gates)

Native (single gate)

Constraint Encoding

Rank-1 Constraint System (R1CS), Plonkish

Conjunctive Normal Form (CNF), Boolean satisfiability

Typical ZKP Backend

Groth16, Plonk, Halo2, Nova

zkSTARK, Bulletproofs (inner product)

ARITHMETIC CIRCUIT BASICS

Frequently Asked Questions

Clear, technical answers to the most common questions about arithmetic circuits, their role in zero-knowledge proofs, and how they represent computation for verifiable machine learning.

An arithmetic circuit is a directed acyclic graph (DAG) that represents a computation as a series of addition and multiplication gates operating over a finite field. The circuit takes inputs (signals) and propagates them through these gates, where each gate's output wire carries the result of its operation. In the context of zero-knowledge proofs, the circuit encodes the statement to be proven—such as the correct execution of a neural network inference—as a set of polynomial constraints. The prover must demonstrate knowledge of a valid witness (the secret inputs and intermediate values) that satisfies every gate in the circuit, without revealing the witness itself. This mathematical representation transforms any NP computation into an algebraic problem suitable for cryptographic proof generation.

Prasad Kumkar

About the author

Prasad Kumkar

CEO & MD, Inference Systems

Prasad Kumkar is the CEO & MD of Inference Systems and writes about AI systems architecture, LLM infrastructure, model serving, evaluation, and production deployment. Over 5+ years, he has worked across computer vision models, L5 autonomous vehicle systems, and LLM research, with a focus on taking complex AI ideas into real-world engineering systems.

His work and writing cover AI systems, large language models, AI agents, multimodal systems, autonomous systems, inference optimization, RAG, evaluation, and production AI engineering.