Intermittent Computing

The cornerstone of intermittent computing, Non-Volatile Memory (NVM) retains data without power. Unlike traditional RAM (volatile), NVM like Ferroelectric RAM (FeRAM), Magnetoresistive RAM (MRAM), or Resistive RAM (ReRAM) is used to store both program state and data. This allows the system to resume execution from a known checkpoint after a power failure. Key uses include:

• Storing live register and stack state.
• Holding intermediate computation results.
• Maintaining the program counter for precise resumption.

Checkpointing is the software technique of periodically saving a consistent snapshot of the system's volatile state to non-volatile memory. The core challenge is ensuring state consistency—the saved checkpoint must represent a valid, recoverable program state to avoid corruption. Techniques include:

• Idempotent operations: Designing computations so they can be safely repeated after a restart.
• Atomic regions: Grouping instructions that must all complete or be rolled back together.
• Logging: Recording changes to data structures to enable replay or rollback.

These systems are powered by energy harvesters that convert ambient energy (light, vibration, thermal, RF) into electricity. The power subsystem is critical and includes:

• Harvester: The transducer (e.g., photovoltaic cell, piezoelectric element).
• Power Management Unit (PMU): Conditions the erratic harvested power, manages storage, and controls power rails.
• Energy Storage: A small capacitor or trickle-charged battery that acts as a buffer. The PMU only enables the main processor when sufficient energy is stored for a meaningful burst of computation, leading to the characteristic intermittent operation.

Traditional sequential programming fails under intermittent power. Task-based models break computation into discrete, restartable units. Frameworks like DINO and Chain allow developers to define tasks with explicit dependencies. The runtime system automatically:

• Schedules tasks when energy is available.
• Checkpoints task outputs to NVM.
• Ensures tasks are executed exactly once, even across multiple power cycles. This abstraction hides the complexity of manual state management from the programmer.

An efficient system uses a hybrid memory architecture to balance speed and persistence.

• Fast Volatile Cache (SRAM): Used for active computation.
• Persistent Non-Volatile Main Memory (NVM): Stores checkpoints and critical data. Data moves between these tiers under programmer or runtime control. The goal is to minimize expensive writes to NVM (which are slower and more energy-intensive than reads) while ensuring no critical data is lost when power fails.

Standard algorithms assume continuous execution. Progress-aware algorithms are redesigned to maximize useful work per energy unit and guarantee forward progress across interruptions. Examples include:

• Intermittent Sorting: Algorithms that partially sort data with each burst, knowing the state is saved.
• Approximate Computing: Trading exactness for completion, producing a "good enough" result sooner if a full run is impossible.
• Energy-Adaptive Methods: Algorithms that can adjust their fidelity or path based on available energy in the capacitor.

Deploying battery-less sensor nodes in remote fields or forests to monitor soil moisture, temperature, and air quality. These systems use energy harvesting from solar or microbial fuel cells. Key techniques include:

• Checkpointing to save sensor state to non-volatile memory (NVM) before power loss.
• Task-based programming models that break computations into atomic, restartable operations.
• Transiently-powered sensors that can operate for years without battery replacement.

Powering next-generation health monitors and bio-implants that harvest energy from body heat, motion, or light. Applications include:

• Continuous glucose monitoring with energy harvested from interstitial fluid.
• Cardiac event recorders that must log data reliably despite motion-induced power interruptions.
• Neural recording patches that use near-threshold computing to minimize energy per operation. The system must guarantee forward progress and data consistency for critical health metrics, often using hardware-assisted checkpointing in specialized microcontrollers.

Embedding maintenance-free sensors into walls, bridges, or industrial equipment to monitor stress, vibration, and corrosion. These systems rely on piezoelectric or thermoelectric harvesters. Key challenges addressed:

• Duty cycling the radio for data transmission only when sufficient energy is stored.
• Volatile state reconstruction after a power failure to resume long-term trend analysis.
• Energy-aware scheduling that prioritizes critical measurements (e.g., crack detection) over less urgent tasks when energy is scarce.

Operating computing systems in satellites or planetary rovers where power is sporadic due to eclipses, dust storms, or extreme temperatures. Intermittent computing ensures:

• Scientific data integrity from instruments across power cycles.
• Reliable command execution for actuators, using idempotent operations to prevent double-actuation after a restart.
• Fault containment where a power loss resets a faulty state without requiring a full ground intervention. Systems often employ radiation-hardened non-volatile flip-flops and persistent task queues.

Pushing computation to the extreme limits of energy availability with devices powered entirely by harvested RF signals. Applications include:

• Computational RFID tags that can perform sensor data filtering before responding to a reader.
• Battery-less inventory sensors that log temperature exposure history across a supply chain.
• Smart dust concepts for massively distributed sensing. These systems operate in the subthreshold or deep subthreshold voltage region and use asynchronous logic to maximize energy efficiency. Execution is often managed by a transiently-powered operating system kernel.

A core software technique in intermittent computing where a system's volatile computational state (e.g., CPU registers, stack, heap variables) is periodically saved to non-volatile memory (NVM). Upon a power failure and subsequent restoration, the system can reload the most recent checkpoint and resume execution rather than restarting from the beginning. This transforms unpredictable power cycles into manageable, frequent save/restore operations.

A fundamental power management strategy where a system alternates between short, active periods of computation and long, idle periods in a low-power sleep state. The ratio of active time to total cycle time is the duty cycle. Intermittent computing can be viewed as an extreme, non-deterministic form of duty cycling, where the 'sleep' period is an uncontrolled power loss and the 'active' period is constrained by harvested energy.

A strict power consumption constraint, typically in the range of single-digit to tens of milliwatts, imposed on an edge device or subsystem. This budget is dictated by the average power output of an energy harvester or the discharge rate of a tiny battery. All system design—processor selection, sensor sampling rate, wireless communication, and inference frequency—must be engineered to operate within this stringent average power envelope.