A fusion group is a set of operators within a neural network's computational graph that have been identified by a compiler as candidates to be combined and executed by a single, optimized fused kernel. This optimization, central to frameworks like XLA, TVM, and torch.compile, aims to reduce kernel launch overhead and minimize costly intermediate memory transfers between operations, directly improving inference latency and throughput.
Glossary
Fusion Group

What is a Fusion Group?
A core concept in compiler-based inference acceleration.
The formation of a fusion group is guided by fusion heuristics and a cost model that analyzes data dependencies, memory access patterns, and operation types to ensure fusion profitability. Common targets include sequences like Conv-BN-ReLU (vertical fusion) or independent elementwise operations (horizontal fusion). The resulting fused kernel executes the entire group's logic in one GPU launch, maximizing data locality in caches and increasing arithmetic intensity.
Key Characteristics of a Fusion Group
A fusion group is a compiler-identified subgraph of operators targeted for combination into a single kernel. Its characteristics determine the feasibility and performance impact of the fusion.
Data Locality & Memory-Bound Operations
A primary characteristic of a profitable fusion group is a memory-bound dataflow pattern. This occurs when operators are limited by the speed of memory access, not computation. Fusing such operators reduces intermediate memory traffic by keeping temporary results in fast registers or shared memory instead of writing them to and reading them from slow global memory. For example, fusing an elementwise ReLU activation directly after a matrix multiplication prevents writing the large matmul output tensor only to immediately read it back for the activation.
Producer-Consumer Relationship (Vertical Fusion)
The most common and profitable fusion pattern is vertical fusion, where a direct producer-consumer relationship exists between operators. This means the output of one operator is the immediate input to the next without other intervening computations. This sequential dependency creates a natural fusion group, as the consumer can begin processing the producer's output elements as soon as they are computed, in a single loop. An example is the canonical Conv-BN-ReLU group, where Convolution produces feature maps consumed directly by Batch Normalization, which are then consumed by the ReLU activation.
Compatible Iteration Spaces & Parallelism
For operators to be fused into a single kernel, they must have compatible iteration spaces. This means their loops can be mapped onto the same parallel execution grid (e.g., CUDA blocks and threads). Operators that perform elementwise operations on the same tensor shape are trivially compatible. Challenges arise when fusing operators with different parallelization schemes (e.g., a reduction with a broadcast). The fusion compiler must analyze data parallelism and thread mapping to ensure the fused kernel does not serialize operations or create excessive thread divergence, which can negate fusion benefits.
Fusion Profitability & Cost Model
Not all eligible groups are fused. A compiler uses a cost model to evaluate fusion profitability. This model estimates:
- Reduction in kernel launch overhead (significant for many small ops).
- Savings in global memory bandwidth from eliminated intermediate stores/loads.
- Potential downsides: increased register pressure, which can reduce occupancy, or decreased parallelism if fusion serializes independent work. The planner performs a trade-off analysis, often fusing memory-bound groups aggressively while avoiding fusion that would make a compute-bound kernel register-limited.
Pattern-Driven Identification
Fusion groups are often identified via pattern matching. Compilers have built-in recognition for known, high-value subgraph patterns that are universally profitable to fuse. Common patterns include:
- Linear Layer + Bias + Activation (e.g., MatMul + Add + GELU).
- Convolution + BatchNorm + Activation.
- LayerNorm (which itself is a compound of mean, variance, normalization).
- Fused Multi-Head Attention (as in FlashAttention). These patterns are matched in the computational graph, and the matched operators are marked as a candidate fusion group for the compiler backend.
Hardware-Specific Constraints
The final characteristic of a viable fusion group is adherence to hardware-specific constraints. Different GPU architectures (e.g., NVIDIA's Ampere vs. Hopper) have varying limits on:
- Maximum kernel size (register count, code size).
- Supported operation mixes within a single kernel.
- Memory hierarchy (shared memory size, cache policies).
A fusion that is profitable on one architecture may be impossible or detrimental on another. Just-In-Time (JIT) fusion compilers like
torch.compilecan make these decisions at runtime based on the detected hardware.
How is a Fusion Group Formed?
A fusion group is formed through a multi-stage compiler optimization process that analyzes a computational graph to identify profitable clusters of operators for combined execution.
Formation begins with graph analysis, where the compiler traverses the model's computational graph to identify adjacent operators with compatible data types and shapes. It applies fusion heuristics or a cost model to evaluate candidate groups based on data dependency, memory access patterns, and operation type. The goal is to create clusters where fusion reduces kernel launch overhead and improves data locality by minimizing intermediate tensor writes to global memory.
The compiler then performs pattern matching to recognize common, high-benefit subgraphs like Conv-BN-ReLU. Using a fusion planner, it constructs an optimal fusion plan, balancing the benefits of reduced memory traffic against potential downsides like increased register pressure. Finally, a fusion compiler pass, such as in XLA, TVM, or MLIR, generates the actual fused kernel code that implements the combined operations for the target hardware.
Common Fusion Group Patterns
Fusion groups are not arbitrary; compilers identify them based on specific, recurring computational patterns within neural network graphs. These patterns represent high-value targets for kernel fusion, offering predictable performance gains.
Elementwise Chains
A fusion group composed of consecutive pointwise operations that apply a function independently to each element of a tensor. This is the most fundamental and profitable pattern for fusion.
- Characteristics: No data dependencies between elements; operations are memory-bandwidth bound.
- Example: A sequence like
Tensor → Sigmoid → Multiply → Add. - Fusion Benefit: The intermediate tensors between
Sigmoid,Multiply, andAddare never written to global memory. All computations are performed in registers or shared memory within a single kernel, eliminating multiple kernel launches and drastically reducing memory traffic.
Vertical (Producer-Consumer) Fusion
A fusion group where a producer operator is fused with its immediate consumer operator. This pattern follows the natural dataflow of the computational graph.
- Characteristics: Direct data dependency; the output of the first operation is the input to the second.
- Example:
Matrix Multiplication → Bias AddorConvolution → Batch Normalization. - Fusion Benefit: The intermediate result (e.g., the raw convolution output) is kept in fast on-chip memory (registers/cache) and immediately consumed by the next operation. This avoids the costly round-trip to high-bandwidth memory (HBM) on GPUs, which is a primary bottleneck.
Horizontal (Parallel) Fusion
A fusion group that merges multiple independent operators that share a common input or execute in parallel. This pattern increases kernel workload and amortizes launch overhead.
- Characteristics: Operators are siblings in the graph, with no data dependencies between them.
- Example: Applying both
ReLUandSigmoidactivations to the same input tensor in two separate branches. - Fusion Benefit: A single kernel reads the input tensor once, performs both independent computations, and writes two output tensors. This improves arithmetic intensity and memory access coalescing compared to launching two separate, smaller kernels.
The Conv-BN-ReLU Block
This is the canonical fused pattern in convolutional neural networks (CNNs). It combines a Convolution, Batch Normalization, and ReLU activation into a single, monolithic kernel.
- Mechanism: The batch normalization statistics (mean, variance, gamma, beta) are folded into the convolution's weights and bias at compile or runtime. The ReLU is then applied elementwise to the normalized result.
- Performance Impact: This fusion can provide a >2x speedup for the block compared to executing three separate kernels. It is a primary optimization in frameworks like TensorFlow/XLA and PyTorch with
torch.compile. - Variants: Includes patterns like
Conv-BN,Conv-ReLU, andLinear-BN-ReLUfor fully connected layers.
Fused Multi-Head Attention
A highly specialized fusion group that encapsulates the entire attention mechanism of a transformer layer. This pattern is critical for large language model (LLM) performance.
- Components: Fuses the query/key/value projections, attention score calculation, softmax, dropout (if training), and the final output projection.
- Exemplar Implementation: FlashAttention (and its successors) is the definitive example. It is an IO-aware fused algorithm that recomputes attention scores on-chip to avoid reading/writing the massive attention matrix to slow HBM.
- Benefit: Enables longer context lengths and significantly higher throughput by reducing memory bandwidth consumption by orders of magnitude compared to a naive, unfused implementation.
Reduction & Elementwise Combos
A fusion group that fuses a reduction operation (e.g., sum, max) with a subsequent elementwise operation that uses its result.
- Characteristics: The reduction produces a scalar or a smaller tensor that is broadcast and used in a following operation.
- Example:
Layer Normalizationinvolves computing the mean and variance (reductions) of a tensor, then normalizing each element using those statistics. - Fusion Benefit: The reduction result can be kept in a thread block's shared memory and immediately used, avoiding a separate kernel to compute the normalization. This pattern is key to fusing operations like Softmax (which involves a max and sum reduction across a dimension).
Types of Fusion Within a Group
A comparison of the primary strategies for grouping and fusing operators, based on their data dependencies and placement within the computational graph.
| Fusion Type | Data Dependency Pattern | Primary Optimization Goal | Typical Profitability | Common Example Pattern |
|---|---|---|---|---|
Vertical Fusion | Sequential producer-consumer chain | Reduce intermediate memory writes/reads | Convolution → BatchNorm → ReLU | |
Horizontal Fusion | Parallel, independent operators | Amortize kernel launch overhead | Multiple parallel elementwise ops on same tensor | |
Elementwise Fusion | Pointwise operations only | Maximize arithmetic intensity; eliminate launch overhead | Add → Tanh → Multiply | |
Memory-Bound Fusion | Mix of light compute & heavy I/O | Reduce data movement between memory hierarchies | Matrix multiplication followed by bias add | |
Compute-Bound Fusion | Combining heavy compute operations | Increase sustained FLOP/s utilization | Fusing two large, independent matrix multiplications | |
Diagonal Fusion | Complex, non-linear dataflow | Exploit producer-consumer across branches | Fusing ops from different parallel graph paths | |
Input Fusion | Multiple ops share a common input | Enable single read of input data | Broadcasting a single tensor to multiple downstream ops |
Frequently Asked Questions
A fusion group is a compiler-identified set of operators within a computational graph that are candidates for combination into a single, optimized kernel. This FAQ addresses common technical questions about their purpose, mechanics, and impact on inference performance.
A fusion group is a set of operators within a neural network's computational graph that a compiler has identified as candidates to be merged and executed by a single, fused kernel. It works by analyzing the graph's data dependencies and memory access patterns to find sequences of operations where the output of one operator is immediately consumed by the next. The compiler then replaces this subgraph with a custom, hand-written or auto-generated kernel that performs the combined computation, eliminating the need to write intermediate results back to global GPU memory. This process reduces kernel launch overhead and improves data locality, directly lowering inference latency.
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Related Terms
A fusion group is a set of operators within a computational graph identified for combination into a single, fused kernel. The following concepts are critical for understanding the compiler techniques, patterns, and hardware considerations that make this optimization effective.
Operator Fusion
Operator fusion is the graph-level optimization that merges adjacent computational operators in a neural network's computational graph into a single, compound operation. This is the primary goal of identifying a fusion group.
- Purpose: Minimizes intermediate memory transfers between global memory and on-chip registers/cache.
- Scope: Works on the abstract computational graph before low-level kernel code is generated.
- Example: Fusing a
Convolution,BatchNorm, andReLUactivation into oneConv-BN-ReLUoperator.
Kernel Fusion
Kernel fusion is the low-level compiler technique that implements operator fusion by generating a single, unified GPU kernel or CPU function. It is the execution mechanism for a fused group.
- Implementation: A compiler pass writes a custom kernel that performs the sequential logic of all fused operators.
- Key Benefit: Dramatically reduces kernel launch overhead and improves data locality by keeping intermediate results in fast registers or shared memory.
- Contrast: Operator fusion is the decision; kernel fusion is the implementation.
Fusion Compiler
A fusion compiler is a specialized compiler or compiler pass responsible for automatically performing operator and kernel fusion optimizations. It identifies fusion groups and generates efficient code.
- Primary Examples: The fusion passes in XLA (TensorFlow/JAX), TVM, and MLIR.
- Process: Takes a high-level computational graph, applies pattern matching and cost models to form fusion groups, and outputs optimized, fused kernel code for a target hardware backend (e.g., CUDA, ROCm).
- Role: The central piece of infrastructure that makes fusion a practical, automated optimization.
Fusion Heuristics & Cost Model
Fusion heuristics are rule-based or cost model-driven algorithms that decide profitability—whether fusing a specific group of operators will yield a net performance gain.
- Factors Considered:
- Data dependencies and producer-consumer relationships.
- Operator types (elementwise, reduction, etc.).
- Memory access patterns and estimated data movement volume.
- Hardware constraints like register pressure and available parallelism.
- Goal: Avoid over-fusion that can lead to inefficient kernels with low occupancy or resource exhaustion.
Vertical vs. Horizontal Fusion
These are two fundamental patterns for forming a fusion group, defined by the dataflow relationship between the operators.
- Vertical Fusion: Merges a producer operator with its direct consumer operator (a sequential chain). This is the most common and profitable pattern, as it eliminates intermediate storage entirely.
- Example:
Matmul→Add(Bias) →GELU.
- Example:
- Horizontal Fusion: Merges multiple independent operators that consume the same input tensor or operate in parallel. This amortizes kernel launch overhead and can improve memory bandwidth utilization.
- Example: Applying
SiLUandTanhactivation functions to the same tensor in two separate model branches.
- Example: Applying
Fused Multi-Head Attention (e.g., FlashAttention)
Fused Multi-Head Attention is a premier example of a highly optimized, hand-tuned fused kernel for a critical transformer component. It exemplifies the extreme performance gains possible from aggressive fusion.
- What it Fuses: Combines the entire attention mechanism—query/key/value projections, attention score calculation, softmax, and output projection—into a single kernel.
- Key Innovation: FlashAttention introduced an IO-aware algorithm that strategically recomputes attention scores on-chip to avoid reading/writing the massive attention matrix to slow GPU HBM memory.
- Impact: Enables training and inference with much longer context lengths by drastically reducing memory footprint and bandwidth requirements.

About the author
Prasad Kumkar
CEO & MD, Inference Systems
Prasad Kumkar is the CEO & MD of Inference Systems and writes about AI systems architecture, LLM infrastructure, model serving, evaluation, and production deployment. Over 5+ years, he has worked across computer vision models, L5 autonomous vehicle systems, and LLM research, with a focus on taking complex AI ideas into real-world engineering systems.
His work and writing cover AI systems, large language models, AI agents, multimodal systems, autonomous systems, inference optimization, RAG, evaluation, and production AI engineering.
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