Polyphase Filter Bank

The foundational architectural insight of the PFB is the application of the Noble Identities of multirate signal processing. This identity allows the order of filtering and decimation to be swapped, placing the down-sampling operation before the sub-band filters. Instead of filtering at the high input sample rate and then discarding M-1 out of every M samples, the polyphase decomposition computes only the required output samples. This reduces the computational workload by a factor equal to the number of channels, M, making wideband channelization feasible on a single FPGA.

The entire channelizer's performance is dictated by a single prototype low-pass filter. This FIR filter is designed to have a passband of π/M and a stopband at π/M with a specified attenuation. The prototype's coefficients, h(n), are then partitioned into M distinct polyphase sub-filters by decimating the impulse response: Eₖ(z) = Σ h(k + nM)z⁻ⁿ. The quality of this prototype—specifically its stopband attenuation and transition bandwidth—directly controls adjacent channel rejection and aliasing distortion in the final analysis bank.

A standard PFB produces uniformly spaced, critically sampled sub-bands. The architecture consists of a commutator that distributes input samples to M polyphase sub-filters, followed by an M-point Inverse Discrete Fourier Transform (IDFT). The commutator rotates by one input sample per clock cycle, feeding each sub-filter. The IDFT then spectrally shifts each baseband sub-filter output to its correct center frequency. This structure is mathematically equivalent to a bank of M bandpass filters modulated by a complex exponential, but implemented with extreme efficiency via the FFT algorithm.

While the classic PFB is critically sampled (decimation factor D equals the number of channels M), many wideband applications require oversampled channelizers where D < M. This relaxes the stringent prototype filter design constraints, allowing for wider transition bands and reduced aliasing. In an oversampled architecture, the output sample rate per channel is higher than the channel bandwidth, which is essential for downstream tasks like cyclostationary analysis and fine carrier synchronization that require excess bandwidth.

An alternative to the commutator-based PFB is the Weighted Overlap-Add (WOLA) structure. Instead of a rotating commutator, the WOLA applies a time-domain window to overlapping blocks of input samples before performing an FFT. The window function serves the same purpose as the prototype filter, shaping the spectral response of each FFT bin. The WOLA is highly flexible, allowing dynamic adjustment of the window shape and overlap ratio, and maps exceptionally well to vectorized DSP processors and GPU-based SDR platforms.

For applications requiring signal modification in the transform domain and resynthesis back to a time-domain waveform, the analysis PFB is paired with a synthesis PFB. The synthesis bank performs an IDFT, up-samples by inserting zeros, and filters through a set of synthesis polyphase components. By jointly designing the analysis and synthesis prototype filters to satisfy perfect reconstruction (PR) or near-PR conditions, the cascade can achieve zero amplitude and phase distortion, which is critical for applications like digital pre-distortion and channelized beamforming.

The process of dividing a wideband signal into multiple narrower sub-bands using a filter bank to enable parallel downstream processing. A polyphase filter bank is the most computationally efficient structure for performing uniform channelization. Each sub-band is typically processed independently for tasks like demodulation, spectrum analysis, or energy detection. The channelizer's key performance metrics include alias rejection, passband ripple, and transition bandwidth.

A multi-stage cascade of down-sampling and filtering operations designed to progressively reduce the sample rate of a signal while preventing aliasing. A polyphase filter bank efficiently combines the final filtering and decimation stages into a single structure. A typical chain might start with a CIC filter for high-rate decimation, followed by a half-band filter, and finally a polyphase filter bank for channelization. Each stage relaxes the filter requirements of the subsequent stage.

The process of translating a digitized signal from a high sample rate to a lower, complex baseband representation through mixing, filtering, and decimation. A polyphase filter bank can be viewed as a parallel bank of DDCs that simultaneously extracts multiple channels. Each channel is tuned by a complex exponential (numerically controlled oscillator) and filtered. The polyphase structure exploits the redundancy between channels to share computations, making it far more efficient than implementing independent DDCs for each channel.

The process of mapping continuous or high-precision values to discrete integer representations with a fixed binary point, essential for efficient FPGA and ASIC implementation. Implementing a polyphase filter bank in fixed-point requires careful analysis of bit growth through each multiply-accumulate stage and rounding strategies to prevent overflow and minimize quantization noise. The Spurious-Free Dynamic Range (SFDR) of the fixed-point implementation is a critical design constraint.

An ARM standard unidirectional point-to-point protocol designed for high-throughput streaming data transfer between IP cores in an FPGA or SoC. A polyphase filter bank IP core typically uses an AXI4-Stream slave for input sample data and an AXI4-Stream master for outputting channelized data. The interface uses a TVALID/TREADY handshake for backpressure, allowing the filter bank to stall upstream processing if its output buffers are full.

The condition where a fixed, known phase relationship is maintained across multiple channels or over time, essential for beamforming and direction-finding applications. A polyphase filter bank must preserve phase coherency between its output channels. This requires deterministic latency through the filter structure and careful management of the phase response of the prototype filter. Any phase distortion between channels degrades the accuracy of angle-of-arrival estimation algorithms.