Memory Depth

The physical composition of the transistor dictates the severity of charge trapping and self-heating.

• Gallium Nitride (GaN): Exhibits significant low-frequency dispersion and gate lag, often requiring deeper memory to model trapping effects.
• LDMOS: Generally has less severe trapping but still requires modeling of thermal dynamics.
• CMOS: Highly integrated but suffers from substrate coupling memory.

Wider signal bandwidths demand a longer temporal observation window to resolve the frequency-dependent memory.

• Narrowband (e.g., 5 MHz): Memory effects span fewer symbol periods; shallow depth suffices.
• Wideband (e.g., 100 MHz for 5G NR): The inverse of the bandwidth defines the time resolution, requiring more taps to cover the same physical time constant.
• Carrier Aggregation: Multi-band signals introduce cross-modulation memory requiring extended depth.

The decoupling and matching networks create a frequency-dependent envelope impedance.

• Low-Frequency Resonance: Baseband impedance interacts with the envelope signal, creating long-term electrical memory.
• Video Bandwidth (VBW): The VBW of the bias circuit must be wide enough to pass the envelope frequency; insufficient VBW introduces significant memory that must be captured by the model.
• Decoupling Capacitors: Parasitic inductances in the bias path create resonances that manifest as memory effects.

Dynamic self-heating and cooling of the transistor channel create long-term memory.

• Junction Temperature: Fluctuates with the instantaneous dissipated power, altering gain and phase.
• Thermal Capacitance: The thermal mass of the die and package creates low-pass filtering of the temperature response.
• Sub-millisecond Effects: Surface heating can cause fast thermal transients.
• Second-range Effects: Package and heat sink dynamics require very deep memory if not compensated separately.

The number of coefficients scales linearly with memory depth in a memory polynomial, directly impacting hardware resources.

• FPGA Resources: Deeper memory consumes more DSP slices and Block RAM for delay lines.
• Coefficient Adaptation: The Least Squares matrix dimension grows with depth, increasing adaptation latency.
• Real-Time Constraints: The processing latency must remain within the loop delay budget; excessive depth can violate timing closure.

The required linearization performance dictates how accurately memory effects must be canceled.

• 3GPP Compliance: Stricter ACLR targets (e.g., -45 dBc) often require deeper memory to suppress memory-induced spectral asymmetry.
• Memoryless vs. Memory DPD: A memoryless DPD corrects AM-AM/AM-PM but leaves memory-induced distortion uncorrected.
• Diminishing Returns: Beyond a certain depth, adding more taps yields negligible ACLR improvement while significantly increasing power consumption.

A simplified Volterra model that retains only the diagonal terms of the Volterra kernels. It captures nonlinear memory effects by summing contributions from the current and past input samples raised to various powers.

• Reduces complexity from O(N^K) to O(N×K)
• Each tap corresponds directly to a memory depth index
• Forms the baseline for Generalized Memory Polynomial extensions

The dependence of a power amplifier's current output on past input values, not just the instantaneous input. This temporal lag causes the amplifier's nonlinear behavior to be history-dependent.

• Thermal memory: Die temperature changes alter transistor gain over microseconds to milliseconds
• Electrical memory: Bias network impedance and capacitor charge states introduce envelope-frequency-dependent effects
• Trapping effects: Semiconductor charge traps in GaN/GaAs devices respond to signal history

An enhanced memory polynomial that includes cross-terms between the signal and its lagging envelope values. This captures complex interactions where the nonlinearity at one time instant depends on the signal magnitude at a different time instant.

• Adds terms of the form x(n)|x(n-m)|^k
• Significantly improves modeling accuracy for wideband signals
• Increases parameter count but remains far sparser than full Volterra

The multidimensional impulse response function within a Volterra series. Each kernel quantifies the specific contribution of a particular nonlinear order and memory depth combination to the system's output.

• First-order kernel: Linear impulse response (memory only, no nonlinearity)
• Third-order kernel: Captures dominant odd-order distortion with memory
• Kernel support in the time dimension directly defines the model's memory depth

A statistical metric that balances model fit against model complexity. It penalizes over-parameterization, making it ideal for selecting the optimal memory depth and nonlinear order for a Volterra model.

• AIC = 2k - 2ln(L) where k is the number of parameters
• Lower AIC indicates a better tradeoff between accuracy and parsimony
• Prevents selecting excessive memory depth that fits noise rather than system dynamics

A Volterra model simplification technique that separates static nonlinearity from low-order dynamic behavior. It drastically reduces the number of parameters needed for weakly nonlinear systems with memory.

• Expresses output as static nonlinear function plus low-order dynamic corrections
• Memory depth is applied only to the deviation terms, not the full model
• Particularly effective for power amplifiers operating near their linear region