Thermal Lag

Thermal lag originates from the finite thermal capacitance and thermal resistance of semiconductor materials. When instantaneous power dissipation changes—due to signal envelope variations—the junction temperature cannot respond instantaneously. Instead, it follows an exponential approach governed by the device's thermal time constant. This creates a window where the amplifier's electrical behavior reflects a past thermal state rather than the current operating condition. The resulting history-dependent gain and phase shifts manifest as long-term memory effects that memoryless predistorters cannot correct, requiring specialized thermal-aware compensation architectures.

Thermal lag is most pronounced at low envelope frequencies where the modulation bandwidth overlaps with the device's thermal bandwidth. Key characteristics include:

• Sub-MHz envelope components generate temperature fluctuations that track the signal envelope with measurable phase delay
• Wideband signals (e.g., 100 MHz 5G NR) may have envelope components spanning from DC to tens of MHz, with only the low-frequency portion causing thermal modulation
• The thermal cutoff frequency—typically 1–100 kHz for GaN HEMTs—defines the boundary between quasi-static and dynamic thermal behavior
• Envelope tracking systems must account for this frequency-dependent thermal response to avoid efficiency degradation

The junction temperature evolution can be precisely modeled as the convolution of instantaneous power dissipation with the device's thermal impulse response. This mathematical framework captures:

• The complete time-domain temperature trajectory for arbitrary modulation waveforms
• The thermal impulse response itself, derived from Foster or Cauer network parameters extracted via transient thermal measurements
• The nonlinear relationship between temperature and electrical parameters (gain, phase, threshold voltage) that must be cascaded with the thermal convolution for complete behavioral modeling
• Real-time implementation challenges, as direct convolution requires significant computational resources, driving the need for recursive filter approximations in embedded DPD systems

Thermal lag coexists with electrical memory effects from bias networks, trapping phenomena, and matching circuits, creating a complex distortion landscape:

• Thermal time constants (microseconds to milliseconds) overlap with low-frequency electrical memory from bias decoupling networks
• GaN trapping effects exhibit thermally activated behavior, where charge capture and emission rates depend exponentially on junction temperature
• The combined memory response cannot be separated by simple filtering—electro-thermal co-simulation is required for accurate model extraction
• Predistorter architectures must allocate model terms to both short-term (electrical) and long-term (thermal) memory, often using augmented memory polynomial structures with dedicated thermal basis functions

Thermal lag produces a distinctive asymmetric spectral regrowth pattern that serves as a diagnostic signature:

• Unlike memoryless nonlinearity, which generates symmetric adjacent channel power, thermal memory creates upper/lower sideband imbalance
• The asymmetry is frequency-dependent, varying with modulation bandwidth and center frequency
• Thermal AM-PM conversion—phase shift as a function of envelope history—is the primary mechanism behind this asymmetry
• Measurement of spectral asymmetry provides a non-invasive method to quantify thermal memory severity and validate compensation effectiveness
• Correcting this asymmetry requires predistorters with complex-valued memory terms that can independently address amplitude and phase distortion in each sideband

Compensating for thermal lag requires extending conventional DPD architectures with temperature-dependent correction terms:

• Temperature-compensated LUTs index predistortion coefficients by both instantaneous amplitude and estimated junction temperature
• Thermal-induced memory polynomials add low-frequency envelope terms with long delays specifically designed to capture thermal memory duration
• Real-time temperature estimation using either direct sensing (on-die diodes) or indirect inference from average power tracking
• Adaptive coefficient update rates must be slow enough to track thermal changes (millisecond scale) while fast enough to maintain linearization during dynamic operation
• The computational overhead of thermal-aware DPD is typically 20–40% above memoryless or short-memory predistorters, requiring careful FPGA resource budgeting

The overarching distortion mechanism where a power amplifier's temperature history—driven by signal envelope variations—alters its instantaneous electrical behavior. Unlike electrical memory effects (nanosecond scale), thermal memory operates on microsecond to millisecond time constants, creating a long-term nonlinear memory that manifests as asymmetric spectral regrowth. This effect is the root cause that thermal lag describes temporally.

The dynamic relationship between power dissipation and junction temperature rise, defining the transfer function that governs thermal lag. Represented as a complex frequency-dependent quantity (Zth), it captures both the magnitude and phase delay of the thermal response. Key parameters include:

• Rth: Static thermal resistance (°C/W)
• Cth: Thermal capacitance (J/°C)
• τ: Thermal time constant (Rth × Cth)

Accurate Zth characterization is essential for building predictive electro-thermal models.

A co-simulation technique that couples semiconductor device physics with dynamic heat generation and dissipation equations. This approach solves the self-consistent problem where:

• Electrical behavior depends on junction temperature
• Junction temperature depends on power dissipation
• Power dissipation depends on electrical behavior

Common implementations use Foster or Cauer thermal networks integrated into compact transistor models, enabling circuit-level simulation of thermal lag-induced distortion.

A behavioral model structure that augments standard memory polynomials with additional terms specifically designed to capture low-frequency, long-duration thermal lag effects. The formulation extends the conventional Volterra-derived model by incorporating:

• Envelope-dependent thermal kernels with large memory depth
• Cross-terms between instantaneous amplitude and temperature history
• Low-pass filtering to emulate the thermal bandwidth limitation

This structure enables compact yet accurate predistorter implementations that address both electrical and thermal memory simultaneously.

A digital linearization technique that incorporates real-time temperature sensing or electro-thermal model estimates into the predistorter coefficient lookup. Unlike conventional DPD that assumes a static PA characteristic, thermal-aware DPD dynamically adapts to shifting nonlinearities caused by:

• Quiescent bias drift from self-heating
• Thermal AM-AM and AM-PM distortion
• Envelope frequency heating from modulation

Implementation approaches include temperature-compensated LUTs and augmented model structures with thermal state inputs.

An imbalance in the upper and lower sidebands of the output spectrum caused by the dispersive phase response of thermal memory. This asymmetry is a telltale signature that distinguishes thermal effects from memoryless nonlinearity:

• Memoryless distortion produces symmetric spectral regrowth
• Thermal memory introduces a frequency-dependent phase shift that skews the regrowth spectrum
• Cannot be corrected by conventional memoryless or short-memory linearization

Detecting this asymmetry is a key diagnostic for validating thermal memory compensation effectiveness.