Loop Delay

Loop delay is not a single value but the sum of multiple distinct propagation segments. It includes the digital-to-analog converter (DAC) group delay, the analog up-conversion and PA transit time, the coupler and attenuator path, the feedback down-conversion chain, and the analog-to-digital converter (ADC) pipeline latency. Each segment introduces a deterministic but temperature-dependent delay. In a typical macro base station, the total loop delay ranges from 50 to 200 nanoseconds, corresponding to tens to hundreds of sample periods at typical DPD observation rates of 491.52 Msps or 983.04 Msps.

Loop delay decomposes into an integer sample delay and a fractional (sub-sample) delay. The integer portion represents whole clock cycles of misalignment and is corrected by shifting the reference buffer pointer. The fractional portion, often on the order of 0.01 to 0.5 samples, arises from analog group delay variations and PCB trace length mismatches. Sub-sample alignment is critical because even a 0.1-sample misalignment can degrade ACLR correction by several dB. Fractional delay filters, typically implemented as Farrow structures or polyphase interpolators, are used to achieve this fine alignment.

The dominant method for estimating loop delay is magnitude cross-correlation between the transmitted reference waveform and the observed feedback signal. The correlation peak directly indicates the integer sample offset. For fractional estimation, parabolic interpolation or sinc-function fitting around the correlation peak provides sub-sample resolution. This estimation is typically performed during a dedicated calibration preamble before live traffic begins. In systems requiring background tracking, a sliding correlator can continuously monitor delay drift caused by temperature-induced group delay changes in analog filters.

Loop delay is not static; it drifts with temperature due to the thermal coefficient of analog components. Surface acoustic wave (SAW) filters and cavity filters in the feedback path exhibit group delay variations of 0.5 to 2 ns per 10°C. In GaN-based Doherty PAs, thermal transients during bursty traffic can modulate the PA's electrical length. A closed-loop DPD system must either periodically re-estimate the delay or implement a delay-locked loop (DLL) that tracks the correlation peak position over time. Failure to track this drift results in a gradual degradation of linearization performance during sustained operation.

Misalignment between the reference and feedback signals directly corrupts the error signal used in coefficient adaptation. A timing offset of even one sample introduces a frequency-dependent phase rotation in the error spectrum, causing the adaptive algorithm to converge to a biased coefficient set. This manifests as incomplete cancellation of intermodulation distortion products and degraded ACLR. In Indirect Learning Architecture (ILA), delay mismatch causes the postdistorter to model an incorrect inverse. In Direct Learning Architecture (DLA), it corrupts the gradient computation, potentially causing the iterative solver to diverge rather than converge.

Compensating loop delay in real-time hardware requires a circular buffer or FIFO structure in the digital front-end. The reference transmit samples are written into this buffer and read out with a programmable offset equal to the estimated integer delay. For fractional delay, a dedicated Farrow interpolator block computes the sub-sample shifted value using a polynomial approximation of the continuous-time signal. On FPGAs, these structures consume minimal resources—typically a few block RAMs for the buffer and a handful of DSP slices for the interpolator—but must be pipelined carefully to meet timing closure at sample rates exceeding 400 MHz.

The process of precisely synchronizing the transmitted reference signal with the observed feedback signal in the digital domain. Without accurate time alignment, the error signal used for coefficient estimation becomes corrupted, leading to incorrect predistorter parameters and degraded linearization performance. Alignment must account for the entire loop delay, including DAC latency, PA group delay, coupler propagation, feedback receiver delay, and ADC latency. Typical alignment precision requirements are on the order of fractional sample periods to maintain EVM integrity.

A digital interpolation filter designed to delay a signal by a non-integer number of sample periods. Loop delay rarely aligns to exact integer sample boundaries, so fractional delay filters are essential for achieving sub-sample time alignment between the reference and feedback paths. Common implementations include:

A dedicated observation receiver chain that down-converts and digitizes a coupled sample of the PA output. The feedback receiver introduces its own group delay and phase rotation that contribute to the total loop delay budget. Key characteristics affecting delay estimation include analog filter latency, mixer propagation delay, and ADC pipeline latency. The receiver's bandwidth must be sufficient to capture the full linearization bandwidth, typically 3-5x the signal bandwidth for effective distortion observation.

A matrix formed by the autocorrelation of basis function outputs, whose inversion or decomposition is a central computational step in block-based coefficient estimation. When loop delay is uncompensated, the correlation matrix becomes ill-conditioned due to misalignment between the basis functions and the observed PA output. Accurate delay compensation restores matrix conditioning, enabling stable QR decomposition or Cholesky factorization for coefficient solving.

A continuous training mode where DPD coefficients are updated transparently during normal data transmission. Background calibration requires persistent loop delay tracking because thermal effects and component drift cause the delay to vary over time. Our implementations include:

A metric quantifying the deviation of a digitally modulated signal's constellation points from their ideal locations. EVM is directly degraded by loop delay misalignment because the error signal used for adaptation no longer corresponds to the correct sample pair. Even sub-sample delay errors introduce phase rotation in the error computation, causing the adaptive algorithm to converge to a suboptimal coefficient set. Proper fractional delay compensation is essential for achieving EVM targets below 1% (-40 dB) in modern wideband systems.