Feedback Receiver

The feedback receiver must exhibit linearity exceeding the target post-DPD performance. Its own nonlinearities become an error floor that the DPD algorithm cannot correct.

• Spurious-Free Dynamic Range (SFDR): Must be 10–15 dB better than the target ACLR improvement to avoid masking PA distortion.
• Third-Order Intercept Point (IP3): A high IP3 ensures the receiver's own intermodulation products do not corrupt the error signal.
• Self-Calibration: Any residual receiver nonlinearity must be characterized and compensated before PA model extraction.

To capture spectral regrowth caused by PA nonlinearity, the feedback receiver must digitize a bandwidth 3–5 times wider than the transmitted signal bandwidth.

• 5th-Order Intermodulation: Capturing distortion up to the 5th order requires observing the 5th harmonic of the signal bandwidth.
• Anti-Alias Filtering: Sharp, linear-phase filters are required to prevent out-of-band noise from folding into the observation band.
• Wideband ADCs: High-speed analog-to-digital converters with flat in-band frequency response are essential for wideband signal linearization.

Accurate time alignment between the reference and feedback signals is a non-negotiable prerequisite. Sub-sample misalignment introduces dispersion that mimics memory effects, corrupting the coefficient estimation.

• Integer Delay Estimation: Cross-correlation techniques resolve the coarse loop delay through the Tx and observation paths.
• Fractional Delay Correction: Fractional delay filters (Farrow structures) achieve sub-sample alignment, typically to within 1/64th of a sample period.
• Phase Coherence: The receiver's local oscillator must maintain phase coherence with the transmitter to preserve the complex baseband relationship.

The feedback receiver's noise floor directly adds to the observed error signal, setting a lower bound on the achievable error vector magnitude (EVM).

• Thermal Noise: Low-noise amplifiers (LNAs) at the receiver front-end minimize the noise figure.
• Quantization Noise: High-resolution ADCs (12–16 bits) ensure quantization noise remains well below the PA's residual distortion floor.
• Averaging Gain: Background calibration can leverage temporal averaging to improve effective SNR, provided the PA behavior is stationary over the averaging interval.

The total propagation delay through the Tx chain, coupler, and feedback receiver must be stable over temperature and time. Delay drift during operation causes misalignment and degrades linearization.

• Deterministic Latency: FPGA-based digital paths provide fixed, known latency. Analog components introduce variable group delay.
• Thermal Drift Compensation: Continuous time alignment tracking loops compensate for slow delay variations caused by temperature changes.
• Buffer Management: Circular buffers in the digital front-end manage the asynchronous relationship between the transmit and observation sample streams.

Phase noise on the feedback receiver's local oscillator introduces random phase modulation that cannot be distinguished from PA memory effects, degrading model extraction accuracy.

• Common LO Architecture: Sharing a single local oscillator between the Tx upconverter and feedback downconverter cancels correlated phase noise.
• Phase Noise Masking: Residual uncorrelated phase noise must be at least 10 dB below the target EVM floor.
• Digital Phase Tracking: Pilot-based phase estimation can track and compensate slow phase wander in the observation path.

The process of precisely synchronizing the transmitted reference signal with the observed feedback signal in the digital domain. This is a prerequisite for accurate error signal computation. Any misalignment, even at a sub-sample level, introduces a phase error that severely degrades linearization performance. Techniques include:

• Cross-correlation for coarse integer-sample alignment
• Fractional delay filters (e.g., Farrow structure) for fine sub-sample adjustment
• Loop delay estimation to compensate for total propagation latency through the Tx and observation paths

A metric quantifying the deviation of a digitally modulated signal's constellation points from their ideal locations. EVM is a direct measure of in-band distortion and modulation accuracy. The feedback receiver's own noise floor and linearity directly limit the minimum EVM that can be measured and, therefore, corrected. Key considerations:

• Expressed as a percentage or in dB relative to the average symbol power
• A high-fidelity feedback path is required to measure the low EVM targets of modern 5G signals
• Residual EVM after DPD is a primary key performance indicator (KPI)

The ratio of transmitted power within an assigned channel to the power leaked into an adjacent channel. This is the primary regulatory metric for spectral regrowth caused by PA nonlinearity. The feedback receiver's dynamic range must be sufficient to capture both the high-power in-band signal and the low-power out-of-band distortion simultaneously. A receiver with poor linearity will generate its own intermodulation products, masking the true PA distortion and limiting ACLR correction capability.

The total propagation latency through the transmission chain (DAC, modulator, PA) and the feedback observation path (coupler, down-converter, ADC). This delay must be accurately estimated and compensated before coefficient estimation can occur. In wideband systems, the delay can span hundreds of samples. An uncompensated loop delay introduces a frequency-dependent phase rotation in the error signal, causing the adaptive algorithm to converge to a suboptimal or unstable solution.

A continuous training mode where DPD coefficients are updated transparently during normal data transmission. This requires the feedback receiver to operate concurrently with the live traffic signal without interrupting the communication link. The receiver must capture the PA output in real-time, and the adaptation algorithm must run in the background. This contrasts with offline calibration, which uses dedicated training sequences and is typically performed only at startup or during maintenance windows.

A control mechanism that halts the adaptation loop to lock the predistorter coefficients. This prevents divergence during periods of no input signal or when the feedback path is unreliable. If the adaptation algorithm continues to run when the PA output drops below the receiver's sensitivity floor, the error signal becomes dominated by noise, causing the coefficients to drift randomly. A robust freeze controller monitors input signal power and feedback signal integrity to gate the update process.