Joint DPD Architecture

Unlike parallel multi-band architectures that deploy independent DPD blocks for each carrier, Joint DPD employs a single, monolithic predistorter that operates on the composite baseband signal. This unified block inherently accounts for all cross-band interactions before the signal reaches the nonlinear power amplifier. The predistorter synthesizes a correction signal that simultaneously pre-compensates for in-band distortion and inter-band intermodulation products, eliminating the need for separate cross-band cancellation stages.

A defining characteristic of Joint DPD is that linearization occurs before frequency upconversion to the final carrier frequencies. The predistorter operates on the combined baseband waveform, which contains all constituent carriers at their relative frequency offsets. This topology requires the DPD block to have sufficient linearization bandwidth to encompass the entire multi-band signal span, including the inter-band gap regions where cross-band distortion products will fall after amplification.

Because the Joint DPD block sees the full composite envelope, it naturally generates correction terms that address cross-modulation and intermodulation distortion (IMD) between carriers. The predistorter's nonlinear basis functions include cross-terms dependent on the instantaneous magnitudes of all concurrent signals. This intrinsic cross-band awareness eliminates the need for explicit cross-band predistorter blocks or separate cross-band cancellation signal paths, simplifying the overall transmitter architecture.

A critical engineering trade-off in Joint DPD is the requirement for wideband digital processing. The predistorter must operate at a sampling rate sufficient to capture the entire composite signal bandwidth plus the distortion bandwidth extending beyond the outermost carriers. For widely spaced multi-band signals, this can demand sampling rates several times higher than the aggregate signal bandwidth, increasing digital power consumption and requiring high-speed data converters and FPGA fabric.

Joint DPD models, such as the Multi-Band Generalized Memory Polynomial (MB-GMP), incorporate cross-band envelope coupling terms and memory effects that scale combinatorially with the number of carriers. Joint coefficient estimation solves for all model parameters simultaneously in a single optimization step, typically using least-squares or adaptive filtering algorithms. While this captures full nonlinear interactions, the coefficient count grows rapidly, demanding robust numerical conditioning and efficient hardware implementation.

Joint DPD differs fundamentally from 2D-DPD (Two-Dimensional DPD) architectures. In 2D-DPD, separate baseband signals are processed independently using a two-dimensional indexing structure based on the magnitudes of both bands, with correction signals applied per-band after upconversion. Joint DPD, by contrast, processes the composite signal as a single entity before upconversion, making it more suitable for tightly spaced carriers where the composite envelope approach is computationally advantageous.

The Joint DPD Architecture operates on a single, combined baseband signal representing the sum of all active carriers. This unified approach inherently captures the cross-band intermodulation distortion (IMD) products generated when the composite signal passes through the nonlinear power amplifier. The predistorter must synthesize a correction signal that pre-compensates for both in-band and cross-band distortion simultaneously, requiring a model that understands the complex envelope of the entire aggregated waveform.

Joint DPD differs fundamentally from Multi-Band DPD (MB-DPD) architectures:

• Joint DPD: A single predistorter block processes the composite signal before upconversion. Simpler RF front-end, but requires high-speed digital processing.
• Separate Multi-Band DPD: Each carrier band has its own dedicated predistorter before signal combination. This allows lower sample rates per band but requires a more complex RF combining network and struggles to cancel cross-band distortion generated after the combiner.

A foundational behavioral model for Joint DPD is the 2D Memory Polynomial. It extends the standard memory polynomial by indexing coefficients using the instantaneous magnitudes of both concurrent baseband signals. This creates a two-dimensional indexing structure that explicitly captures cross-band memory effects. The model includes terms dependent on |x1(n)| and |x2(n)|, allowing the predistorter to adjust its correction based on the envelope power in both bands simultaneously.

In a Joint DPD system, Joint Coefficient Estimation is critical. All predistorter parameters—including those governing cross-band cancellation—are extracted in a single optimization step. This is typically performed using a Multi-Band Indirect Learning Architecture (MB-ILA), where a post-distorter model is identified from the attenuated PA output and then copied to the forward-path predistorter. The joint estimation ensures that the complex interactions between bands are correctly modeled, preventing the error propagation seen in sequential estimation methods.

A Joint DPD block is often preceded by Multi-Band Crest Factor Reduction (MB-CFR). Because the composite signal has a higher Peak-to-Average Power Ratio (PAPR) than individual carriers, MB-CFR jointly processes the combined waveform to reduce peaks before predistortion. This prevents the power amplifier from being driven into deep saturation, which would generate distortion beyond the DPD's correction capability. The CFR and DPD algorithms must be co-designed to avoid conflicting signal modifications.

Implementing Joint DPD on FPGA or ASIC platforms involves significant trade-offs:

• Sampling Rate: Must be high enough (typically 5x signal bandwidth) to capture and cancel wideband distortion.
• Look-Up Tables (LUTs): 2D-LUTs are often used for efficient hardware implementation, indexing complex gain values by a two-dimensional address derived from signal magnitudes.
• Power Consumption: The high-speed digital logic required for a single, wideband predistorter can consume more power than separate, lower-rate DPD blocks, making this a key design consideration for massive MIMO arrays.