Power-Added Efficiency (PAE)

The choice of substrate fundamentally limits achievable PAE. Gallium Nitride (GaN) offers superior efficiency at mmWave frequencies due to high electron mobility and wide bandgap, enabling higher power density with less waste heat compared to Gallium Arsenide (GaAs) or Silicon CMOS.

• GaN-on-SiC achieves PAE > 40% at 28 GHz
• CMOS typically peaks at 15-25% in mmWave bands
• Material choice directly impacts thermal memory effects

The conduction angle defines the theoretical efficiency ceiling. Class-A amplifiers conduct for 360° with a maximum theoretical PAE of 50%, while Class-AB balances linearity and efficiency. Doherty architectures use load modulation to maintain high PAE at back-off.

• Class-A: 50% max theoretical, poor average efficiency
• Class-AB: Common compromise for linearity vs. efficiency
• Doherty: Maintains PAE at 6-10 dB Output Back-Off (OBO)

Modern wideband signals like OFDM exhibit high PAPR, forcing the PA to operate at significant back-off from its peak-efficiency point. A signal with 10 dB PAPR may force a PA to operate at 10 dB below saturation, drastically reducing average PAE.

• 5G NR signals: 8-12 dB PAPR typical
• Crest Factor Reduction (CFR) can improve PAE by 3-5 percentage points
• Envelope tracking recovers efficiency lost to back-off

PAE is highly sensitive to the impedance presented at the transistor's current generator plane. Load-pull analysis identifies optimal impedance contours for maximum PAE. In phased arrays, active impedance mismatch during beam-steering pulls the PA away from this optimum.

• Optimal Z_load varies with frequency and power level
• Beam-steering causes channel-specific PAE degradation
• Antenna crosstalk further distorts load impedance

PAE inherently degrades as carrier frequency increases toward the device's f_T and f_max limits. At mmWave frequencies, parasitic capacitances and reduced gain compress efficiency. Wide instantaneous bandwidths introduce frequency-dependent memory effects that further erode PAE.

• GaN f_max > 200 GHz enables viable mmWave PAE
• Bandwidths > 400 MHz challenge matching network design
• Trapping effects in GaN become more pronounced at high frequencies

Junction temperature rise directly degrades carrier mobility and PAE, creating a positive feedback loop where reduced efficiency generates more heat. Thermal memory effects cause slow PAE fluctuations tied to signal envelope history.

• Every 10°C rise can reduce PAE by 1-2 percentage points
• GaN-on-Diamond substrates offer 3x better heat spreading
• Envelope tracking reduces DC power dissipation and thermal load