LUT Memory Depth

Memory depth captures the power amplifier's short-term memory effects caused by bias circuit impedance, trapping phenomena, and thermal dynamics. A depth of D taps means the LUT is indexed not just by the current sample |x(n)|, but also by |x(n-1)|, |x(n-2)|, ..., |x(n-D)|. This creates a (D+1)-dimensional addressing space that maps historical envelope values to predistortion coefficients, enabling the correction of frequency-dependent nonlinearities that simple memoryless models miss.

Adding memory depth causes exponential growth in LUT storage requirements. If a memoryless LUT with K entries per dimension requires K coefficients, a depth-D LUT requires K^(D+1) entries. For example, a 256-entry table with depth 2 demands 256³ = 16.7 million coefficients. This explosion drives the need for LUT partitioning, compression techniques, and sparse indexing to make multi-dimensional predistortion feasible in FPGA or ASIC implementations with constrained block RAM.

Multi-dimensional LUT addressing requires hardware-efficient index computation. The memory address is formed by concatenating or hashing the quantized values of the current and delayed envelope samples:

• Linear addressing: address = i₀ + K·i₁ + K²·i₂ + ... + K^D·i_D
• Tile-based addressing: partitions the multi-dimensional space into smaller sub-tables
• Hashing: reduces dimensionality through XOR or polynomial mixing of tap indices The addressing logic must complete within a single clock cycle to maintain real-time throughput at giga-sample rates.

Not all historical samples contribute equally to distortion correction. Tap selection algorithms identify the most significant delay positions:

• Uniform spacing: taps at n-1, n-2, n-3, ...
• Non-uniform spacing: taps clustered around the main impulse response lobe
• Sparse selection: uses only 2-3 taps at critical delays identified through correlation analysis or LASSO regression Optimal tap selection reduces the effective dimensionality while preserving adjacent channel leakage ratio (ACLR) improvement.

The required memory depth scales with signal bandwidth relative to the PA's memory time constant. Narrowband signals (< 20 MHz) often need only 1-2 taps because the envelope varies slowly relative to memory effects. Wideband signals (> 100 MHz) for 5G NR and satellite communications demand 3-5 taps to capture frequency-dependent gain and phase variations across the band. The memory span (D × sampling period) must exceed the PA's impulse response duration for complete linearization.

Increasing memory depth slows LMS and RLS adaptation convergence because the coefficient vector grows exponentially. A depth-D system must estimate K^(D+1) complex coefficients from the error signal. Techniques to accelerate convergence include:

• Per-tap learning rate scaling: higher rates for recent taps, lower for older taps
• Decoupled adaptation: train each memory dimension independently using separable least squares
• Initialization from memoryless solution: start with converged depth-0 coefficients and incrementally add taps Convergence time typically scales as O(K^D) iterations.

For modulation bandwidths exceeding 100 MHz in 5G NR and satellite communications, the power amplifier exhibits significant electrical memory effects. A memoryless LUT fails to correct frequency-dependent distortion. By incorporating 2-3 memory taps, the LUT addresses a multi-dimensional space where each index combines the instantaneous envelope with prior sample magnitudes, suppressing spectral regrowth that a static table cannot reach.

GaN and GaAs power amplifiers suffer from slow thermal trapping effects where die temperature modulates gain on a microsecond scale. A memory depth of 1-2 captures these long-term memory effects by correlating current distortion with the envelope history. The LUT effectively learns a thermal inverse model, stabilizing gain over bursty transmission patterns common in TDD systems.

Doherty power amplifiers exhibit complex load modulation dynamics where the peaking amplifier's turn-on characteristic introduces a history-dependent phase shift. A memory depth of 2-3 allows the LUT to index not just the current signal level but the trajectory of the envelope through the Doherty transition region. This corrects the AM-PM distortion that memoryless tables leave uncorrected, restoring modulation accuracy.

In envelope tracking systems, the power amplifier supply voltage dynamically follows the signal envelope. Mismatches between the RF envelope and the tracker's slew rate create a memory-dependent distortion mechanism. A multi-tap LUT learns the interaction between the supply voltage trajectory and the resulting gain variation, jointly correcting the PA nonlinearity and the tracker-induced artifacts.

When amplifying two widely separated carriers simultaneously, cross-modulation products depend on the combined envelope history of both signals. A memory depth of 3-5 constructs a high-dimensional indexing space that captures the intermodulation memory, allowing a single LUT to cancel distortion products that fall into both transmit bands and the adjacent spectrum.

Each additional memory tap exponentially increases the LUT address space. A depth of 3 with 256 envelope quantization levels yields 16.7 million potential entries. Practical implementations use LUT partitioning and interpolation to manage this curse of dimensionality. The optimal depth is the minimum required to meet the ACLR specification, balancing FPGA block RAM consumption against linearization performance.