LUT-Based DPD

The core mechanism relies on mapping the instantaneous magnitude (or power) of the input signal to a specific memory address. This envelope-dependent addressing assumes the PA's nonlinearity is primarily a function of the input amplitude, allowing a 1-D or 2-D table to correct complex gain compression.

• AM-AM Correction: Compensates for gain expansion/compression.
• AM-PM Correction: Compensates for phase shift dependent on input power.
• Address Calculation: Typically involves magnitude computation (CORDIC or sqrt) followed by quantization.

Most modern implementations use a Complex-Gain LUT architecture. Instead of storing separate I and Q correction values, a single complex coefficient (I+jQ) is stored per entry. This coefficient is multiplied directly with the complex baseband input signal.

• Single Complex Multiply: Minimizes hardware multipliers.
• Joint Correction: Simultaneously corrects AM-AM and AM-PM distortion.
• Memory Efficiency: Reduces storage compared to dual I/Q tables.

LUTs can operate in static (open-loop) or adaptive (closed-loop) modes. Static tables are pre-trained offline and fixed, suitable for stable environments. Adaptive LUTs use a feedback path (observation receiver) to update coefficients in real-time.

• LMS Update: Least Mean Squares is the standard iterative algorithm for minimizing error power.
• Ping-Pong Buffering: A dual-bank memory structure ensures seamless updates without corrupting the active predistortion path.
• Convergence Rate: Dictated by the step size (mu) in the adaptation algorithm.

The finite size of the LUT introduces quantization error. To mitigate this without exploding memory size, interpolation is used between adjacent entries.

• Linear Interpolation: Simple, low-latency, but introduces spectral regrowth if table is too sparse.
• Higher-Order Interpolation: Polynomial or spline methods offer smoother correction but increase computational latency.
• Non-Uniform Spacing: Allocates more entries to the high-compression region of the PA (near saturation) and fewer to the linear region, optimizing correction accuracy per bit of memory.

Basic LUTs assume a memoryless PA. To handle electrical and thermal memory effects, the LUT dimensionality must be extended. A 2D LUT indexes by current envelope and a delayed envelope sample.

• LUT Memory Depth: The number of taps (historical samples) used for indexing.
• Curse of Dimensionality: Memory requirements grow exponentially with depth, often requiring LUT partitioning or compression.
• Volterra Pruning: Often used to identify which memory taps are most significant to limit table size.

LUTs are highly favored in FPGA and ASIC implementations due to their deterministic latency and low power profile compared to polynomial evaluation.

• Block RAM (BRAM): FPGAs map LUTs directly to dedicated memory blocks.
• Zero Computational Overhead: Correction is a simple memory read and multiply, avoiding high-order polynomial computation.
• LUT Compression: Techniques like piecewise-linear approximation reduce the number of stored coefficients to save silicon area and power.

A digital memory array storing pre-computed predistortion coefficients indexed by instantaneous signal envelope values. The LUT acts as a nonlinear mapping function that applies the inverse of the power amplifier's distortion characteristic.

• Stores complex-gain values (AM-AM and AM-PM correction)
• Indexed by instantaneous input power or magnitude
• Enables real-time linearization with minimal computational latency
• Trade-off between table size and quantization error

The process of mapping an input signal's instantaneous power or magnitude to a specific memory address within the predistortion look-up table. The indexing function determines which stored coefficient is applied to correct the current sample.

• Uses magnitude-squared or envelope as the address
• Uniform indexing: equal spacing across dynamic range
• Non-uniform indexing: higher density in compression regions
• Address calculation must complete within one sample period

A mathematical technique for estimating predistortion values between discrete table entries to reduce quantization error. Without interpolation, the LUT output jumps discontinuously between adjacent entries, causing spectral regrowth.

• Linear interpolation: simplest, uses two adjacent entries
• Polynomial interpolation: higher accuracy, more computation
• Reduces required table size for a given ACLR target
• Critical for wideband signals with high peak-to-average ratios

A predistortion table architecture that stores a single complex-valued coefficient per entry to simultaneously correct both amplitude and phase distortion. Each entry contains an in-phase (I) and quadrature (Q) component.

• Corrects AM-AM distortion (gain compression)
• Corrects AM-PM distortion (phase shift vs. input power)
• Single complex multiply per sample in the datapath
• Most common architecture for FPGA-based DPD implementations

An iterative adaptation algorithm that minimizes the mean squared error between the desired and actual amplifier output to recursively update LUT coefficients. The LMS algorithm is the workhorse of adaptive predistortion.

• Update equation: w(n+1) = w(n) + μ · e(n) · x(n)*
• μ (step size) controls convergence speed vs. steady-state noise
• Operates on the error signal from the feedback path
• Computationally efficient: O(N) complexity per iteration

A dual-buffer memory architecture where one look-up table is actively used for predistortion while the other is being updated in the background. This ensures seamless, glitch-free coefficient switching.

• Buffer A: active predistortion path
• Buffer B: updated by adaptation algorithm
• Atomic swap occurs after convergence or at defined intervals
• Eliminates transient artifacts during coefficient updates
• Essential for continuous-operation transmitter systems