Power Supply Rejection Ratio (PSRR)

PSRR is the ratio of the change in supply voltage to the resulting change in output voltage, expressed in decibels (dB). A higher PSRR indicates superior rejection of supply-borne interference.

• Formula: PSRR = 20 × log₁₀(ΔV_supply / ΔV_output)
• Typical values: 60-80 dB for precision analog circuits; 20-40 dB for high-speed switching modulators
• Frequency dependence: PSRR degrades at higher frequencies due to finite bandwidth of feedback loops
• Differential vs. single-ended: Differential topologies inherently provide better PSRR through common-mode rejection

In ET systems, the supply modulator must deliver a wideband dynamic voltage while rejecting input supply ripple. Poor PSRR allows switching ripple artifacts from the DC-DC converter to intermodulate with the RF carrier, creating spurious emissions.

• Switching frequency leakage: Buck converter switching noise (typically 10-100 MHz) can appear as sidebands around the RF carrier
• Intermodulation mechanism: Supply ripple modulates the PA's nonlinear capacitance, causing supply-induced AM-PM distortion
• Critical bandwidth: PSRR must remain high across the full envelope bandwidth (up to 200 MHz for 5G NR signals)
• Hybrid modulator challenge: The parallel combination of linear and switching stages creates complex PSRR profiles

PSRR is not constant across frequency. At higher frequencies, parasitic capacitances and finite op-amp gain-bandwidth product cause rejection to roll off, making wideband ET applications particularly demanding.

• Low-frequency PSRR: Dominated by DC loop gain of the error amplifier; typically excellent (>80 dB)
• Mid-frequency PSRR: Limited by the unity-gain bandwidth of the feedback loop; begins to degrade at the dominant pole
• High-frequency PSRR: Determined by feedforward paths through parasitic capacitances and PCB layout; often the weakest region
• Resonance effects: Output capacitor ESL and PCB trace inductance can create PSRR notches at specific frequencies

Supply modulator PSRR directly affects the quality of the ET-DPD joint model. If supply ripple corrupts the PA drain voltage, the DPD model sees an inaccurate representation of the actual supply waveform, degrading linearization accuracy.

• Model mismatch: The dual-input behavioral model assumes a clean supply voltage; ripple introduces unmodeled distortion terms
• EVM degradation: Poor PSRR can increase Error Vector Magnitude by 0.5-2% in wideband systems
• ACLR impact: Switching artifacts intermodulating with the RF signal elevate adjacent channel leakage
• Mitigation strategies: Multi-stage LC filtering, feedforward ripple cancellation, and high-PSRR linear regulator post-filtering

Achieving high PSRR in wideband supply modulators requires careful circuit design and layout. Key techniques address both conducted and radiated supply noise coupling paths.

• Cascode current sources: Increase output impedance of bias circuits, reducing supply-to-output coupling
• Supply-independent biasing: Use bandgap-referenced bias networks that reject supply variations
• Fully differential architectures: Cancel common-mode supply noise through symmetric signal paths
• Guard rings and shielding: Prevent substrate coupling of switching noise in mixed-signal ICs
• Multi-stage regulation: Cascade a high-PSRR linear regulator after the switching converter to filter residual ripple

PSRR is often confused with related but distinct specifications. Understanding the differences is critical for proper ET system design.

• PSRR vs. CMRR: PSRR measures supply-to-output rejection; Common-Mode Rejection Ratio measures input common-mode rejection
• PSRR vs. ripple rejection: Ripple rejection specifically refers to 120 Hz (or 100 Hz) rectified mains ripple; PSRR is the broader frequency-dependent specification
• PSRR vs. line regulation: Line regulation is a DC specification (mV/V); PSRR extends to AC frequencies
• PSRR vs. isolation: Galvanic isolation provides complete DC and low-frequency separation; PSRR quantifies residual coupling in non-isolated circuits

A high-efficiency, high-bandwidth power converter responsible for generating the dynamically varying supply voltage in an envelope tracking system. The modulator's output is not a perfect replica of the target envelope; it contains switching ripple artifacts and slew-rate limitations. PSRR quantifies how effectively the downstream RF power amplifier ignores these non-idealities. A modulator with high output noise demands a PA with correspondingly high PSRR to prevent supply noise from upconverting around the RF carrier.

Residual high-frequency voltage ripple at the output of a switching supply modulator. This ripple is a primary aggressor that PSRR is designed to reject. The artifact intermodulates with the RF carrier, creating spurious emissions at offsets equal to the switching frequency and its harmonics. Key considerations:

• Ripple amplitude depends on modulator switching frequency and output filter design
• PSRR typically degrades at higher frequencies, making high-frequency ripple harder to reject
• Mitigation requires either increasing PSRR or reducing ripple amplitude through multi-phase interleaving

Unwanted phase modulation of the output RF signal caused by the dynamic variation of the power amplifier's supply voltage. This occurs because the PA's nonlinear parasitic capacitances vary with drain voltage. Even if a PA has excellent PSRR for amplitude noise, it may still exhibit poor phase noise rejection. This distinction is critical: PSRR is often specified separately for AM and PM paths, and the digital predistorter must correct both the gain and phase errors induced by residual supply ripple.

The precise time-synchronization of the RF signal path and the envelope tracking supply voltage path at the power amplifier's transistor drain. Misalignment causes the instantaneous supply voltage to be incorrect for the RF envelope, generating distortion that PSRR cannot address. PSRR assumes a steady-state or slowly-varying supply; a timing skew creates a transient condition where the PA's operating point is grossly incorrect. Typical alignment requirements are on the order of hundreds of picoseconds for wideband signals.

The nonlinear variation in a power amplifier's gain as a function of its instantaneous drain voltage. This is the physical mechanism that PSRR attempts to characterize. When the supply voltage ripples, the PA's gain modulates, creating an envelope that mixes with the RF carrier. PSRR is effectively the inverse of this gain sensitivity:

• High PSRR = low gain variation per millivolt of supply change
• GaN PAs typically exhibit different gain compression profiles than GaAs or LDMOS
• The shaping function in ET systems must account for this compression to maintain linearity

A single, unified behavioral model that simultaneously captures the nonlinear dynamics of both the power amplifier and the supply modulator. This model implicitly accounts for finite PSRR by treating the actual modulator output—including ripple and noise—as an input variable. By modeling the supply-dependent behavior directly, the joint model enables a single predistorter to compensate for the entire transmitter chain without requiring explicit PSRR specifications. This approach is essential when PSRR varies significantly across frequency or operating conditions.