ET-DPD 3D Look-Up Table (3D LUT)

Unlike a conventional 1D LUT indexed solely by instantaneous input power, the 3D LUT uses two independent indexing variables: |x(n)| (input signal magnitude) and Vdd(n) (instantaneous supply voltage). This dual-input structure creates a two-dimensional address space where each cell stores a complex gain correction value (I and Q components). The LUT outputs a multiplicative correction factor G(|x|, Vdd) that pre-distorts the baseband signal to invert the supply-dependent gain compression characteristic of envelope tracking PAs.

• Index 1: Instantaneous input envelope magnitude |x(n)|
• Index 2: Instantaneous drain/supply voltage Vdd(n)
• Output: Complex gain correction (I + jQ) applied multiplicatively
• Addressing: 2D interpolation between adjacent cells for smooth correction

The 3D LUT is fundamentally a memoryless predistorter, meaning it corrects only static or quasi-static nonlinearities that depend on the instantaneous operating point. It does not model thermal memory effects, charge trapping in GaN devices, or long-term bias circuit dynamics. The correction applied at time n depends solely on |x(n)| and Vdd(n), with no dependence on past signal samples. This makes it computationally lightweight but requires pairing with memory polynomial or Volterra structures when significant memory effects are present.

• Corrects: Static AM-AM and AM-PM distortion under dynamic supply
• Does not correct: Thermal memory, trapping effects, bias modulation memory
• Advantage: Low computational complexity, suitable for real-time implementation
• Limitation: Requires supplementary memory compensation for wideband signals

Each cell in the 3D LUT represents a point on the PA's supply-dependent gain surface. This surface describes how the PA's complex gain varies as a function of both input drive level and drain voltage. The LUT effectively stores an inverse model of this surface: for each (|x|, Vdd) coordinate, it provides the predistortion gain needed to linearize the output. The surface is typically populated through offline characterization using a vector network analyzer or through adaptive training with an observation receiver.

• Gain surface: G_PA(|x|, Vdd) — the PA's nonlinear transfer characteristic
• LUT contents: G_DPD(|x|, Vdd) ≈ 1/G_PA(|x|, Vdd) — the inverse correction
• Population method: Swept-power, swept-voltage characterization
• Interpolation: Bilinear interpolation between adjacent grid points

The 3D LUT's effectiveness is directly coupled to the shaping function that maps |x(n)| to Vdd(n). If the shaping function changes, the (|x|, Vdd) coordinate mapping shifts, and the LUT must be re-trained or re-indexed. This tight coupling is why ET-DPD co-design is critical: the shaping function and the 3D LUT must be jointly optimized. A poorly designed shaping function can create regions of the LUT that are sparsely populated or exhibit extreme gain compression, degrading linearization performance.

• Shaping function: Vdd = f(|x|) — determines LUT address mapping
• Co-design requirement: LUT and shaping function optimized together
• Sparse regions: Operating points rarely visited, leading to poor correction
• Re-training trigger: Any change in shaping function or PA bias conditions

In hardware implementation (FPGA or ASIC), the 3D LUT uses bilinear interpolation to compute correction values for input coordinates that fall between stored grid points. The addressing logic computes the four nearest neighbor cells based on quantized |x| and Vdd values, then performs a weighted average. This ensures smooth predistortion without discontinuities. The quantization resolution of each axis (typically 6-8 bits for |x|, 4-6 bits for Vdd) determines the LUT memory footprint and correction fidelity trade-off.

• Interpolation: Bilinear (2D) between four neighboring cells
• |x| resolution: Typically 64-256 levels (6-8 bits)
• Vdd resolution: Typically 16-64 levels (4-6 bits)
• Total cells: Product of both resolutions (e.g., 256×64 = 16,384 cells)
• Memory footprint: Each cell stores complex gain (2×16-bit = 4 bytes)

A critical advantage of the 3D LUT over 1D structures is its ability to correct ET-induced AM/PM distortion. When the PA's drain voltage changes dynamically, the device's input and output capacitances vary, causing supply-dependent phase shift. The 3D LUT stores complex gain values (magnitude and phase), allowing it to apply a phase rotation that varies with both |x| and Vdd. This is essential because the phase distortion surface in an ET PA is typically a strong function of both input drive and supply voltage.

• AM/PM source: Voltage-dependent device capacitances (Cgs, Cds)
• Correction: Phase rotation stored in LUT's complex gain values
• 1D LUT limitation: Cannot correct supply-dependent phase variations
• Measurement: Requires vector-calibrated characterization across the 2D grid