Envelope Tracking (ET)

A deterministic mapping function, typically implemented as a look-up table (LUT) or polynomial, that translates instantaneous baseband signal magnitude |x(n)| into a target supply voltage Vdd(n) for the PA. The shaping function is the critical interface between the RF and power domains:

• Iso-gain contour mapping: Derives Vdd from constant-gain curves on the PA's characteristic plane to maintain linearity
• Efficiency-optimized shaping: Pushes the PA deeper into compression at lower envelope levels to maximize PAE
• Differential shaping: Applies different mappings for rising vs. falling envelope edges to compensate for memory effects
• Detroughing: Introduces a minimum voltage floor to prevent the PA from entering cutoff

The shaping function fundamentally determines the linearity-efficiency trade-off of the ET system.

The precise time-synchronization of the RF signal path and the envelope tracking supply voltage path at the PA transistor drain. Timing mismatch between these two paths is one of the most severe sources of distortion in ET systems:

• Sub-nanosecond alignment is typically required for wideband signals
• A mismatch of even 100 picoseconds can degrade ACLR by 10-15 dB
• Alignment is complicated by group delay variations in the supply modulator, RF chain, and PCB traces
• Fractional delay filters (Farrow structure) are commonly used for fine digital alignment
• Adaptive delay estimation algorithms correlate the transmitted and observed signals to track delay drift over temperature and aging

Unwanted phase modulation of the output RF signal caused by the dynamic variation of the PA's drain/collector voltage. As the supply voltage changes to track the envelope, the nonlinear input capacitance (Cgs, Cgd) of the transistor varies, causing:

• Phase shift variation with instantaneous Vdd
• Memory effects due to thermal and trapping time constants
• AM/PM conversion that cannot be corrected by memoryless predistortion alone

This distortion is particularly severe in GaN HEMT and LDMOS PAs and requires dual-input behavioral models that capture the supply-dependent phase response. The DPD must apply complex-valued gain corrections indexed by both input power and instantaneous supply voltage.

A simpler alternative to envelope tracking that adjusts the PA supply voltage on a slot-by-slot or frame-by-frame basis based on average output power rather than instantaneous envelope. Key differences from ET:

• Bandwidth requirement: APT modulators need only ~kHz bandwidth vs. ~100+ MHz for ET
• Efficiency: APT achieves moderate efficiency gains (10-20%) vs. ET's potential 30-50% improvement
• Complexity: APT requires no shaping function, no delay alignment, and minimal DPD adaptation
• Linearity impact: APT causes negligible additional distortion since the supply is quasi-static relative to the modulation

APT is widely used in 4G/5G handsets where cost and complexity constraints preclude full ET, while ET is preferred in base stations and high-tier devices where maximum efficiency is critical.

A joint optimization methodology where the digital predistortion linearization algorithm and the envelope tracking supply modulator are designed concurrently rather than sequentially. Traditional design treats DPD and ET as independent subsystems, but co-design recognizes their deep coupling:

• The shaping function directly impacts the nonlinearity that DPD must correct
• The modulator bandwidth determines which distortion products DPD can effectively linearize
• Joint optimization of shaping function and DPD coefficients can improve overall PAE by 5-10 percentage points
• Co-simulation frameworks model the PA, modulator, and DPD together to explore the Pareto frontier of efficiency vs. linearity
• End-to-end training of neural network DPD with ET-aware loss functions